From: Wei Wang2 Subject: [PATCH 1/3] AMD IOMMU: Fix event log interrupt handling Date: Wed, 3 Dec 2008 16:18:27 +0100 Message-ID: <1228317507.20236.300.camel@gran.amd.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="=-Z2V9QCOwgv7LlCVeVZD7" Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: xen-devel Cc: Keir Fraser List-Id: xen-devel@lists.xenproject.org --=-Z2V9QCOwgv7LlCVeVZD7 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Reset EventLogInt bit in iommu status register(MMIO offset 2020h) in event log interrupt handler, to show software has handled the interrupt. Completion wait interrupt is disabled. -Wei Signed-off-by: Wei Wang -- AMD Saxony, Dresden, Germany Operating System Research Center Legal Information: AMD Saxony Limited Liability Company & Co. KG Sitz (Gesch=C3=A4ftsanschrift): Wilschdorfer Landstr. 101, 01109 Dresden, Deutschland Registergericht Dresden: HRA 4896 vertretungsberechtigter Komplement=C3=A4r: AMD Saxony LLC (Sitz Wilmington, Delaware, USA) Gesch=C3=A4ftsf=C3=BChrer der AMD Saxony LLC: Dr. Hans-R. Deppe, Thomas McCoy --=-Z2V9QCOwgv7LlCVeVZD7 Content-Disposition: attachment; filename="event_log.patch" Content-Type: text/x-patch; name="event_log.patch"; charset="UTF-8" Content-Transfer-Encoding: 7bit diff -r ab0c1bdede53 xen/drivers/passthrough/amd/iommu_init.c --- a/xen/drivers/passthrough/amd/iommu_init.c Wed Nov 26 11:14:26 2008 +0000 +++ b/xen/drivers/passthrough/amd/iommu_init.c Wed Dec 03 15:43:29 2008 +0100 @@ -235,8 +235,7 @@ static void __init set_iommu_event_log_c IOMMU_CONTROL_EVENT_LOG_INT_SHIFT, &entry); writel(entry, iommu->mmio_base+IOMMU_CONTROL_MMIO_OFFSET); - set_field_in_reg_u32(enable ? IOMMU_CONTROL_ENABLED : - IOMMU_CONTROL_DISABLED, entry, + set_field_in_reg_u32(IOMMU_CONTROL_DISABLED, entry, IOMMU_CONTROL_COMP_WAIT_INT_MASK, IOMMU_CONTROL_COMP_WAIT_INT_SHIFT, &entry); writel(entry, iommu->mmio_base+IOMMU_CONTROL_MMIO_OFFSET); @@ -391,20 +390,19 @@ static void parse_event_log_entry(u32 en u32 code; u64 *addr; char * event_str[] = {"ILLEGAL_DEV_TABLE_ENTRY", - "IO_PAGE_FALT", - "DEV_TABLE_HW_ERROR", - "PAGE_TABLE_HW_ERROR", - "ILLEGAL_COMMAND_ERROR", - "COMMAND_HW_ERROR", - "IOTLB_INV_TIMEOUT", - "INVALID_DEV_REQUEST"}; - - code = get_field_from_reg_u32(entry[1], - IOMMU_EVENT_CODE_MASK, - IOMMU_EVENT_CODE_SHIFT); - - if ( (code > IOMMU_EVENT_INVALID_DEV_REQUEST) - || (code < IOMMU_EVENT_ILLEGAL_DEV_TABLE_ENTRY) ) + "IO_PAGE_FALT", + "DEV_TABLE_HW_ERROR", + "PAGE_TABLE_HW_ERROR", + "ILLEGAL_COMMAND_ERROR", + "COMMAND_HW_ERROR", + "IOTLB_INV_TIMEOUT", + "INVALID_DEV_REQUEST"}; + + code = get_field_from_reg_u32(entry[1], IOMMU_EVENT_CODE_MASK, + IOMMU_EVENT_CODE_SHIFT); + + if ( (code > IOMMU_EVENT_INVALID_DEV_REQUEST) || + (code < IOMMU_EVENT_ILLEGAL_DEV_TABLE_ENTRY) ) { amd_iov_error("Invalid event log entry!\n"); return; @@ -428,13 +426,20 @@ static void amd_iommu_page_fault(int vec static void amd_iommu_page_fault(int vector, void *dev_id, struct cpu_user_regs *regs) { - u32 event[4]; + u32 event[4]; + u32 entry; unsigned long flags; int ret = 0; struct amd_iommu *iommu = dev_id; spin_lock_irqsave(&iommu->lock, flags); ret = amd_iommu_read_event_log(iommu, event); + /* reset interrupt status bit */ + entry = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET); + set_field_in_reg_u32(IOMMU_CONTROL_ENABLED, entry, + IOMMU_STATUS_EVENT_LOG_INT_MASK, + IOMMU_STATUS_EVENT_LOG_INT_SHIFT, &entry); + writel(entry, iommu->mmio_base+IOMMU_STATUS_MMIO_OFFSET); spin_unlock_irqrestore(&iommu->lock, flags); if ( ret != 0 ) @@ -466,7 +471,7 @@ static int set_iommu_interrupt_handler(s amd_iov_error("can't request irq\n"); return 0; } - + iommu->vector = vector; return vector; } --=-Z2V9QCOwgv7LlCVeVZD7 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel --=-Z2V9QCOwgv7LlCVeVZD7--