From: Paulo Zanoni Subject: [PATCH] drm/i915: Haswell FBC supports up to 4096x4096 Date: Thu, 23 May 2013 18:30:10 -0300 Message-ID: <1369344610-4395-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-gg0-f171.google.com (mail-gg0-f171.google.com [209.85.161.171]) by gabe.freedesktop.org (Postfix) with ESMTP id 16EA1E65B3 for ; Thu, 23 May 2013 14:30:37 -0700 (PDT) Received: by mail-gg0-f171.google.com with SMTP id h13so1300025ggd.16 for ; Thu, 23 May 2013 14:30:36 -0700 (PDT) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Paulo Zanoni , rodrigo.vivi@intel.com List-Id: intel-gfx@lists.freedesktop.org From: Paulo Zanoni But only the first 2048 lines will be compressed. No problem. With this I can finally see FBC on my 2560x1440 DP monitor, which gives me a boost on the PC7 residency. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_pm.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 6fdfd1a..190bae5 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -431,7 +431,7 @@ void intel_disable_fbc(struct drm_device *dev) * - no pixel mulitply/line duplication * - no alpha buffer discard * - no dual wide - * - framebuffer <= 2048 in width, 1536 in height + * - framebuffer <= max_hdisplay in width, max_vdisplay in height * * We can't assume that any compression will take place (worst case), * so the compressed buffer has to be the same size as the uncompressed @@ -449,6 +449,7 @@ void intel_update_fbc(struct drm_device *dev) struct intel_framebuffer *intel_fb; struct drm_i915_gem_object *obj; int enable_fbc; + unsigned int max_vdisplay, max_hdisplay; if (!i915_powersave) return; @@ -507,8 +508,17 @@ void intel_update_fbc(struct drm_device *dev) dev_priv->no_fbc_reason = FBC_UNSUPPORTED_MODE; goto out_disable; } - if ((crtc->mode.hdisplay > 2048) || - (crtc->mode.vdisplay > 1536)) { + + if (INTEL_INFO(dev)->gen < 7 || IS_IVYBRIDGE(dev) || + IS_VALLEYVIEW(dev)) { + max_hdisplay = 2048; + max_vdisplay = 1536; + } else { + max_hdisplay = 4096; + max_vdisplay = 4096; + } + if ((crtc->mode.hdisplay > max_hdisplay) || + (crtc->mode.vdisplay > max_vdisplay)) { DRM_DEBUG_KMS("mode too large for compression, disabling\n"); dev_priv->no_fbc_reason = FBC_MODE_TOO_LARGE; goto out_disable; -- 1.8.1.2