Received: from eggs.gnu.org ([2001:4830:134:3::10]:49042) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WUjNp-0004Os-Pg for qemu-devel@nongnu.org; Mon, 31 Mar 2014 17:04:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WUjNg-0003is-KB for qemu-devel@nongnu.org; Mon, 31 Mar 2014 17:04:41 -0400 From: Tom Musta Date: Mon, 31 Mar 2014 16:04:00 -0500 Message-Id: <1396299843-7313-7-git-send-email-tommusta@gmail.com> In-Reply-To: <1396299843-7313-1-git-send-email-tommusta@gmail.com> References: <1396299843-7313-1-git-send-email-tommusta@gmail.com> Subject: [Qemu-devel] [V2 PATCH 6/9] target-ppc: Correct VSX Scalar Compares List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Tom Musta , qemu-ppc@nongnu.org This change fixes the VSX scalar compare instructions. The existing usage of "x.f64[0]" is changed to "x.VsrD(0)". Signed-off-by: Tom Musta Tested-by: Tom Musta --- target-ppc/fpu_helper.c | 13 +++++++------ 1 files changed, 7 insertions(+), 6 deletions(-) diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c index 1c37b30..6233d5e 100644 --- a/target-ppc/fpu_helper.c +++ b/target-ppc/fpu_helper.c @@ -2360,10 +2360,10 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ getVSR(xA(opcode), &xa, env); \ getVSR(xB(opcode), &xb, env); \ \ - if (unlikely(float64_is_any_nan(xa.f64[0]) || \ - float64_is_any_nan(xb.f64[0]))) { \ - if (float64_is_signaling_nan(xa.f64[0]) || \ - float64_is_signaling_nan(xb.f64[0])) { \ + if (unlikely(float64_is_any_nan(xa.VsrD(0)) || \ + float64_is_any_nan(xb.VsrD(0)))) { \ + if (float64_is_signaling_nan(xa.VsrD(0)) || \ + float64_is_signaling_nan(xb.VsrD(0))) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); \ } \ if (ordered) { \ @@ -2371,9 +2371,10 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ } \ cc = 1; \ } else { \ - if (float64_lt(xa.f64[0], xb.f64[0], &env->fp_status)) { \ + if (float64_lt(xa.VsrD(0), xb.VsrD(0), &env->fp_status)) { \ cc = 8; \ - } else if (!float64_le(xa.f64[0], xb.f64[0], &env->fp_status)) { \ + } else if (!float64_le(xa.VsrD(0), xb.VsrD(0), \ + &env->fp_status)) { \ cc = 4; \ } else { \ cc = 2; \ -- 1.7.1