From: Stefan Roese Date: Fri, 7 Nov 2014 13:50:34 +0100 Subject: [U-Boot] [PATCH 6/6] arm: socfpga: Add Designware (DW) SPI support to config header In-Reply-To: <1415364634-8290-1-git-send-email-sr@denx.de> References: <1415364634-8290-1-git-send-email-sr@denx.de> Message-ID: <1415364634-8290-7-git-send-email-sr@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Enable support for the DW master SPI controller in the config header for the SoCFPGA. This controller can only be enabled, if DT support is enabled. Signed-off-by: Stefan Roese Cc: Chin Liang See Cc: Dinh Nguyen Cc: Vince Bridgers Cc: Marek Vasut Cc: Pavel Machek --- include/configs/socfpga_common.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 9fc4212..830b956 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -191,6 +191,18 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_CMD_SF #endif +#ifdef CONFIG_OF_CONTROL /* DW SPI is controlled via DT */ +#define CONFIG_CMD_DM +#define CONFIG_DM +#define CONFIG_DM_SPI +#define CONFIG_DESIGNWARE_SPI +#ifndef __ASSEMBLY__ +unsigned int cm_get_spi_controller_clk_hz(void); +#define CONFIG_DW_SPI_REF_CLK cm_get_spi_controller_clk_hz() +#endif +#define CONFIG_CMD_SPI +#endif + /* * Serial Driver */ -- 2.1.3