From: Scott Wood Date: Fri, 20 Mar 2015 19:33:43 -0500 Subject: [U-Boot] [PATCH v4 20/28] armv8/ls2085ardb: Add support of LS2085ARDB platform In-Reply-To: <1426897768-22798-1-git-send-email-yorksun@freescale.com> References: <1426897768-22798-1-git-send-email-yorksun@freescale.com> Message-ID: <1426898023.27998.254.camel@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Fri, 2015-03-20 at 17:29 -0700, York Sun wrote: > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index f4a7851..7478eb4 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -658,6 +658,16 @@ config TARGET_LS2085AQDS > development platform that supports the QorIQ LS2085A > Layerscape Architecture processor. > > +config TARGET_LS2085ARDB > + bool "Support ls2085ardb" > + select ARM64 > + select ARMV8_MULTIENTRY > + help > + Support for Freescale LS2085ARDB platform. > + The LS2080A Reference design board (RDB) is a high-performance > + development platform that supports the QorIQ LS2085A > + LayerScape Architecture processor. > + s/LayerScape/Layerscape/ > diff --git a/board/freescale/ls2085aqds/README b/board/freescale/ls2085ardb/README > similarity index 73% > copy from board/freescale/ls2085aqds/README > copy to board/freescale/ls2085ardb/README > index a4d7b53..cfd5185 100644 > --- a/board/freescale/ls2085aqds/README > +++ b/board/freescale/ls2085ardb/README > @@ -1,10 +1,8 @@ > Overview > -------- > -The LS2080A Development System (QDS) is a high-performance computing, > -evaluation, and development platform that supports the QorIQ LS2080A > -LayerScape Architecture processor. The LS2080AQDS provides validation and > -SW development platform for the Freescale LS2080A processor series, with > -a complete debugging environment. > +The LS2085A Reference Design (RDB) is a high-performance computing, > +evaluation, and development platform that supports the QorIQ LS2085A > +Layerscape Architecture processor. "LayerScape" and 2080 should be fixed in the QDS patch as well. > @@ -113,25 +105,25 @@ unsigned long get_board_ddr_clk(void); > #define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ > | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ > | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ > - | CSOR_NAND_RAL_3 /* RAL = 2Byes */ \ > - | CSOR_NAND_PGS_2K /* Page Size = 2K */ \ > - | CSOR_NAND_SPRZ_64/* Spare size = 64 */ \ > - | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ > + | CSOR_NAND_RAL_3 /* RAL = 3Byes */ \ > + | CSOR_NAND_PGS_4K /* Page Size = 4K */ \ > + | CSOR_NAND_SPRZ_224 /* Spare size = 224 */ \ > + | CSOR_NAND_PB(128)) /*Pages Per Block = 128*/ From this it looks like the QDS patch still has a comment/code inconsistency with RAL. -Scott