From: Kai Huang Subject: [PATCH 0/2] Deter enabling of EPT A/D bit plus coding style fix Date: Tue, 20 Oct 2015 10:34:44 +0800 Message-ID: <1445308486-25132-1-git-send-email-kai.huang@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: jbeulich@suse.com, andrew.cooper3@citrix.com, george.dunlap@eu.citrix.com, kevin.tian@intel.com, jun.nakajima@intel.com, xen-devel@lists.xen.org Cc: Kai Huang List-Id: xen-devel@lists.xenproject.org Patch 1 is the v2 of defering enabling of EPT A/D bit until PML get enabled, with comments from Jan in v1 addressed. Patch 2 is coding style fix of for_each_vcpu to existing PML functions according to Jan. Kai Huang (2): x86/ept: defer enabling of EPT A/D bit until PML get enabled. x86/vmx: fix coding style of PML functions xen/arch/x86/hvm/vmx/vmcs.c | 32 ++++++++++++++++++++++++++++---- xen/arch/x86/mm/p2m-ept.c | 24 ++++++++++++++++++++---- xen/include/asm-x86/hvm/vmx/vmcs.h | 2 ++ 3 files changed, 50 insertions(+), 8 deletions(-) -- 2.1.4