From: Bin Meng Date: Tue, 13 Nov 2018 00:21:56 -0800 Subject: [U-Boot] [PATCH 08/19] riscv: Enlarge the default SYS_MALLOC_F_LEN In-Reply-To: <1542097327-6629-1-git-send-email-bmeng.cn@gmail.com> References: <1542097327-6629-1-git-send-email-bmeng.cn@gmail.com> Message-ID: <1542097327-6629-9-git-send-email-bmeng.cn@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Increase the heap size for the pre-relocation stage, so that CPU driver can be loaded. Signed-off-by: Bin Meng --- arch/riscv/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 4292ffd..f020060 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -87,4 +87,7 @@ config RISCV_CLINT The CLINT block holds memory-mapped control and status registers associated with software and timer interrupts. +config SYS_MALLOC_F_LEN + default 0x1000 + endmenu -- 2.7.4