Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1HNIXG-0007mw-1u for qemu-devel@nongnu.org; Fri, 02 Mar 2007 19:55:42 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1HNIXE-0007mk-FB for qemu-devel@nongnu.org; Fri, 02 Mar 2007 19:55:41 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1HNIXE-0007mh-B9 for qemu-devel@nongnu.org; Fri, 02 Mar 2007 19:55:40 -0500 Received: from vc4-2-0-87.dsl.netrack.net ([199.45.160.85] helo=harmony.bsdimp.com) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA:32) (Exim 4.52) id 1HNIXD-0004OL-Pv for qemu-devel@nongnu.org; Fri, 02 Mar 2007 19:55:40 -0500 Date: Fri, 02 Mar 2007 17:53:33 -0700 (MST) Message-Id: <20070302.175333.1622572844.imp@bsdimp.com> Subject: Re: [Qemu-devel] [PATCH] pcnet32 driver change, please test From: "M. Warner Losh" In-Reply-To: <20070302231450.GA6741@miranda.arrow> References: <20070302200949.GD27636@networkno.de> <20070302231450.GA6741@miranda.arrow> Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, sdbrady@ntlworld.com In message: <20070302231450.GA6741@miranda.arrow> Stuart Brady writes: : On Fri, Mar 02, 2007 at 08:09:49PM +0000, Thiemo Seufer wrote: : > Hello All, : > : > I changed the pcnet32 driver to get rid of bitfields in its : > implementation, now it works also on big endian host systems. : : I find this curious... C99 (6.7.2.1) says "the allocation order of : bit-fields within a unit (high-order to low-order or low-order to : high-order) is implementation defined". I can't see any requirement : for this, so is it just convention that bitfields on big endian systems : start from the most significant bit, and those on little endian systems : start from the least significant bit? (My thinking is that endianness : usually refers to byte ordering and not so much bit ordering.) This is a convention that goes back a very long ways. It was this way in the mid 1980's, and has remained true through today. I've personally observed this to be the case on many different MIPS compilers, ARM compilers and SPARC compilers over the years. Warner