From: Wolfgang Denk Date: Fri, 18 Apr 2008 06:14:13 +0200 Subject: [U-Boot-Users] [MIPS] cpu/mips/cpu.c: Fix flush_cache bug In-Reply-To: Your message of "Tue, 08 Apr 2008 16:20:35 +0900." <47FB1CC3.2090904@necel.com> Message-ID: <20080418041413.F2FC0248B9@gemini.denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de In message <47FB1CC3.2090904@necel.com> you wrote: > Cache operations have to take line address (addr), not start_addr. > I noticed this bug when debugging ping failure. > > Signed-off-by: Shinya Kuribayashi > --- > > cpu/mips/cpu.c | 4 ++-- > 1 files changed, 2 insertions(+), 2 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de It is impractical for the standard to attempt to constrain the behavior of code that does not obey the constraints of the standard. - Doug Gwyn