From: Ingo Molnar Subject: Re: [PATCH 30 of 38] xen: implement io_apic_ops Date: Thu, 20 Nov 2008 20:22:18 +0100 Message-ID: <20081120192218.GF3955@elte.hu> References: <20081120093506.GB6885@elte.hu> <492597B9.8070506@goop.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <492597B9.8070506@goop.org> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Jeremy Fitzhardinge Cc: Xen-devel , Ian Campbell , the arch/x86 maintainers , linux-kernel@vger.kernel.org, "Eric W. Biederman" , "H. Peter Anvin" , Thomas Gleixner , Yinghai Lu List-Id: xen-devel@lists.xenproject.org * Jeremy Fitzhardinge wrote: > Ingo Molnar wrote: >> * Jeremy Fitzhardinge wrote: >> >> >>> Writes to the IO APIC are paravirtualized via hypercalls, so implement >>> the appropriate operations. >>> >>> Signed-off-by: Jeremy Fitzhardinge >>> --- >>> arch/x86/xen/Makefile | 3 +- >>> arch/x86/xen/apic.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++ >>> arch/x86/xen/enlighten.c | 2 + >>> arch/x86/xen/xen-ops.h | 2 + >>> 4 files changed, 72 insertions(+), 1 deletion(-) >>> >> >> hm, why is the ioapic used as the API here, and not an irqchip? >> > > In essence, the purpose of the series is to break the 1:1 > relationship between Linux irqs and hardware GSIs. This allows me > to have my own irq allocator, which in turn allows me to intermix > "physical" irqs (ie, a Linux irq number bound to a real hardware > interrupt source) with the various software/virtual irqs the Xen > system needs. > > Once a physical irq has been mapped onto a gsi interrupt source, the > mechanisms for handing the ioapic side of things are more or less > the same. There's the same procedure of finding the ioapic/pin for > a gsi and programming the appropriate vector. > > (Presumably once I implement MSI support, all references to "gsi" > will become "gsi/msi/etc".) > > So, there's an awkward tradeoff. I could just completely duplicate > the whole irq/vector/ioapic management code and hide it under my own > irqchip, but it would end up duplicating a lot of the existing code. > My alternative was to try to open out the existing code into > something like a thin ioapic library, which I can call into as > needed. The only low-level difference is that the Xen ioapics need > to be programmed via a hypercall rather than register writes. > > If the x86 interrupt layer in general decouples irqs from GSIs, then > I can probably make use of that to clean things up. A general irq > allocator along with some way of attaching interrupt-source-specific > information to each irq would get me a long way, I think. I'd still > need hooks to paravirtualize the actual ioapic writes, but at least > I wouldn't need to have quite so much delicate hooking. it certainly looks thin enough to me although i'm really not sure we want to virtualize at the IO-APIC level. Peter, what's your opinion/preference? Ingo