From: Guillaume Thouvenin Subject: [Patch 0/5] x86_emulator: emulate shld and shrd instructions Date: Thu, 4 Dec 2008 14:24:18 +0100 Message-ID: <20081204142418.709d321d@frecb000711> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: Avi Kivity , guillaume.thouvenin@ext.bull.net To: kvm Return-path: Received: from ecfrec.frec.bull.fr ([129.183.4.8]:52374 "EHLO ecfrec.frec.bull.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753232AbYLDNYX (ORCPT ); Thu, 4 Dec 2008 08:24:23 -0500 Sender: kvm-owner@vger.kernel.org List-ID: This series of patches emulate instructions shld and shrd. As those instructions have three operands we introduce a decode set for the Src2 operand. By doing this, the opcode descriptor needs to be extend to 32 bit. So this series of patches: [1/5] extend the opcode descriptor to 32 bits [2/5] add Src2 decode set [3/5] add a new "implied 1" Src decode type [4/5] add the assembler code for three operands (one operand is stored in EXC) [5/5] add the emulation of shld and shrd instructions