Date: Mon, 15 Dec 2008 23:41:46 +0100
From: Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] [PATCH 03/42] target-ppc: add gen_avr_ptr function.
Message-ID: <20081215224146.GX22069@hall.aurel32.net>
References: <1229307315-16807-1-git-send-email-froydnj@codesourcery.com>
	<1229307315-16807-4-git-send-email-froydnj@codesourcery.com>
	<20081215221643.GG8523@volta.aurel32.net>
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Sender: Aurelien Jarno <aurelien@aurel32.net>
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To: Nathan Froyd <froydnj@codesourcery.com>
Cc: qemu-devel@nongnu.org

On Mon, Dec 15, 2008 at 11:16:43PM +0100, Aurelien Jarno wrote:
> On Sun, Dec 14, 2008 at 06:14:36PM -0800, Nathan Froyd wrote:
> > 
> > Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
> > ---
> >  target-ppc/translate.c |    7 +++++++
> >  1 files changed, 7 insertions(+), 0 deletions(-)
> > 
> > diff --git a/target-ppc/translate.c b/target-ppc/translate.c
> > index 70047c7..41ae158 100644
> > --- a/target-ppc/translate.c
> > +++ b/target-ppc/translate.c
> > @@ -6053,6 +6053,13 @@ GEN_HANDLER2(icbt_440, "icbt", 0x1F, 0x16, 0x00, 0x03E00001, PPC_BOOKE)
> >  /***                      Altivec vector extension                         ***/
> >  /* Altivec registers moves */
> >  
> > +static always_inline TCGv_ptr gen_avr_ptr(int reg)
> > +{
> > +    TCGv_ptr r = tcg_temp_new();
> > +    tcg_gen_addi_ptr(r, cpu_env, offsetof(CPUPPCState, avr[reg]));
> > +    return r;
> > +}
> > +
> >  #define GEN_VR_LDX(name, opc2, opc3)                                          \
> >  GEN_HANDLER(name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC)                  \
> >  {                                                                             \
> 
> I am still pondering what is the better solution between passing a
> pointer to an avr register or the avr register number.
> 
> Does someone has an opinion about that?
> 

Note that SSE helpers are also using pointers.

-- 
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