From: Jean-Christophe PLAGNIOL-VILLARD Date: Mon, 17 Aug 2009 23:45:08 +0200 Subject: [U-Boot] [PATCH 3/3 v4] arm: A320: Add support for Faraday A320 evaluation board In-Reply-To: <4A7895C9.8060506@gmail.com> References: <20090708113044.GO30395@game.jcrosoft.org> <4A7686DA.2000008@gmail.com> <20090804194831.GC4638@game.jcrosoft.org> <4A7895C9.8060506@gmail.com> Message-ID: <20090817214508.GE23695@game.jcrosoft.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 23:10 Tue 04 Aug , Darius Augulis wrote: > On 08/04/2009 10:48 PM, Jean-Christophe PLAGNIOL-VILLARD wrote: > >On 09:42 Mon 03 Aug , Darius Augulis wrote: > >>On 07/08/2009 02:30 PM, Jean-Christophe PLAGNIOL-VILLARD wrote: > >>>On 15:14 Fri 03 Jul , Po-Yu Chuang wrote: > >>>>This patch adds support for A320 development board from Faraday. This board > >>>>uses FA526 processor by default and has 512kB and 32MB NOR flash, 64M RAM. > >>>>FA526 is an ARMv4 processor and uses the ARM920T source in this patch. > >>>> > >>>as I understand correctly the faraday and the CS3518 share the same core and > >>>IP so it will be better to have the same dir > >>I don't think so. Both A320 and Gemini share the same FA526 core, > >>but different peripheral. There is no reason to create generic dir > >>for A320 and Gemini. Also, no reason to create cpu/fa526 because > >>fa526 is almost arm920t. > >duplicate code is worse > >as example on at91 we do support multiple soc of the family in the same > >generic dir which allow us to factorize common code and ofcourse split > >soc specific code too > > Gemini and A320 are not from the same family. There isn't any common > code *yet*. They share only the same core. > There are more dirs in cpu/arm920t: "imx", "s3c24x0", etc. Perhaps > you won't suggest to move all these SoC's into single dir? no as they do share nothing if the code is arm920t specific it will more to arm/920t if soc arm920t/at91 etc.... > > A320 and Gemini *maybe* have the same timer IP, but there are few > 'small' problems. First: these processors, made in China, have very > poor documentation. I must do lot of reverse-engineering work to > create something working. Second, I don't have any A320 hardware to > test something. It's very difficult to make most optimal release at > the very beginning. After we have Gemini in main line, somebody > interested in A320 should feel free to submit patches to optimize > support for SoC's, based on FA526 core. Now I can't do this job and > I guess it shouldn't be reason to reject my patches? you are two dev working to add both soc mainline so please sync together to not add duplicated code that all I want Best Regards, J.