From: Rabin VINCENT Date: Wed, 7 Apr 2010 11:45:32 +0530 Subject: [U-Boot] [PATCH 6/8] ux500: add SoC-specific code In-Reply-To: <4BAF9503.5040706@windriver.com> References: <1268886061-6382-1-git-send-email-rabin.vincent@stericsson.com> <1268889017-32457-1-git-send-email-rabin.vincent@stericsson.com> <4BAF9503.5040706@windriver.com> Message-ID: <20100407061531.GC7459@bnru02.bnr.st.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Sun, Mar 28, 2010 at 07:42:27PM +0200, Tom wrote: > Rabin Vincent wrote: > > +/* Turn on peripheral clock at PRCC level */ > > +void u8500_clock_enable(int periph, int kern, int cluster) > > +{ > > + struct clkrst *clkrst = (struct clkrst *) clkrst_base[periph - 1]; > > -1 on array access. > Convert to unsigned access I'm not sure what you mean by this. Periph numbering starts from 1. > > + > > + if (kern != -1) > > + writel(1 << kern, &clkrst->kcken); > > + > > + if (cluster != -1) > > + writel(1 << cluster, &clkrst->pcken); > > Checking that some of the parameters are expected to be bad. > This function should be split. The three arguments to this function come from a table in the SoC manual. -1 corresponds to the "not used" cells in the table. The function is better unsplit since the majority of peripherals require both the register writes to enable their clock. Rabin