From: Daniel Vetter Subject: Re: [PATCH] intel-gtt: fix memory corruption with GM965 and >4GB RAM Date: Sat, 26 Feb 2011 00:05:27 +0100 Message-ID: <20110225230527.GC3601@viiv.ffwll.ch> References: <20110223233022.GA3439@x61s.reliablesolutions.de> <20110225123056.GA3759@x61s.reliablesolutions.de> <20110225211646.GA6837@x61s.reliablesolutions.de> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail.ffwll.ch (cable-static-49-187.intergga.ch [157.161.49.187]) by gabe.freedesktop.org (Postfix) with ESMTP id 893089E760 for ; Fri, 25 Feb 2011 15:05:41 -0800 (PST) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org List-Id: intel-gfx@lists.freedesktop.org On Fri, Feb 25, 2011 at 10:18:16PM +0000, Chris Wilson wrote: > So, I'm happy to use your patch to workaround the known erratum. I just > wish I had an explanation as to what is actually causing the corruption. > What I want to make sure is that we don't paper over a real bug by > thinking it is yet another silicon issue. Actually, on style points I prefer your patch: The hw status page is allocated with drm_pci_alloc which calls dma_alloc_coherent, so setting the coherent mask is sufficient. The dma mask set in the gtt is essentially useless, because we call get_user_pages on everything anyway (in gem - iirc agp uses it). I just think it's confusing to limit the general dma mask and continue to happily map pages above 4G. Cheers, Daniel -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48