From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH 7/7] drm/i915: set TRANSCODER_EDP even
	earlier
Date: Sat, 26 Jan 2013 17:57:56 +0100
Message-ID: <20130126165756.GV23080@phenom.ffwll.local>
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To: Paulo Zanoni <przanoni@gmail.com>
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On Fri, Jan 25, 2013 at 04:59:16PM -0200, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> Instead of setting it at the beginning of haswell_crtc_mode_set, let's
> set it at the beginning of intel_crtc_mode_set. When
> intel_crt_mode_set calls drm_vblank_pre_modeset we already need to
> have the transcoder_edp correctly set, because eventually
> drm_vblank_pre_modeset calls functions that call i915_pipe_enabled
> from i915_irq.c, which will read PIPECONF(cpu_transcoder).
> 
> This is a bug that affects us since we added support for
> TRANSCODER_EDP, but I was only able to see the problem after
> suspending a machine with the power well disabled (got an "unclaimed
> register" error.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>

I've picked up patches 4-7 from this series. I'm leaving patch 3 out for
now until that entire "unclaimed register write business" with the dynamic
power down well code is settled.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch