From: Tom Rini Date: Fri, 20 Mar 2015 13:09:59 -0400 Subject: [U-Boot] [PATCH 2/6] ARM: tegra: Disable SPL and non-cached memory on 64-bit In-Reply-To: <550C4A24.4020602@wwwdotorg.org> References: <1426854262-1248-1-git-send-email-thierry.reding@gmail.com> <1426854262-1248-2-git-send-email-thierry.reding@gmail.com> <550C4A24.4020602@wwwdotorg.org> Message-ID: <20150320170959.GJ32541@bill-the-cat> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Fri, Mar 20, 2015 at 10:26:12AM -0600, Stephen Warren wrote: > On 03/20/2015 06:24 AM, Thierry Reding wrote: > >From: Thierry Reding > > > >For 64-bit ARM SoCs we rely on non-U-Boot code to bring up the CPU in > >AArch64 mode so that we don't need the SPL. Non-cached memory is not > >implemented (yet) for 64-bit ARM. > > >diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h > > >+#ifndef CONFIG_ARM64 > > #ifndef CONFIG_SPL_BUILD > > #define CONFIG_USE_ARCH_MEMCPY > > #endif > >+#endif > > We don't need SPL, but that stanza used to enable ARCH_MEMCPY > *except* for SPL. I would expect we still want ARCH_MEMCPY on ARM64, > where presumably ifndef CONFIG_SPL_BUILD will always be true? First we need arch memcpy/memset for aarch64 copied over (and maybe update the 32bit one and get everyone using them). -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: