From: Robert Lippert <roblip@gmail.com>
To: openbmc@lists.ozlabs.org
Cc: clg@kaod.org,
	Robert Lippert <rlippert@google.com>
Subject: [PATCH linux  0/3] ASPEED SPI driver support for dual IO mode
Date: Mon,  9 Jan 2017 17:05:20 -0800
Message-Id: <20170110010524.116687-1-rlippert@google.com>
Precedence: list


Adds support for dual IO SPI mode.  This speeds up SPI accesses, dropping
time to dump an entire 64MB Macronix chip from ~12s to ~6s using:
	dd if=/dev/mtdblock0 bs=64MB count=1 of=/dev/null

The dual IO bit mode should not depend on any board-specific properties
as it uses the same IO lines as single bit mode.  Only issue could be
if a board used a one-way level tranlator or mux on the MOSI line
but that seems unlikely to me.

Tested on Zaius board with AST2500 chip, not tested on AST2400 but I
expect it to work since registers are identical.

Note dropped TODO about quad mode since ASPEED SPI controller does
not support quad mode.


Robert Lippert (3):
  mtd: spi-nor: add SPI_NOR_DUAL_READ to mx66l51235l
  mtd: spi-nor: aspeed: add support for SPI dual IO read mode
  mtd: spi-nor: aspeed: fix DMA access on AST2500

 drivers/mtd/spi-nor/aspeed-smc.c | 30 +++++++++++++++++++++++-------
 drivers/mtd/spi-nor/spi-nor.c    |  2 +-
 2 files changed, 24 insertions(+), 8 deletions(-)

-- 
2.11.0.390.gc69c2f50cf-goog