From: Imre Deak Subject: [PATCH] drm/i915/gen8+: Init/reset display interrupts only if i915 IRQs are enabled Date: Thu, 28 Sep 2017 13:06:24 +0300 Message-ID: <20170928100624.15533-1-imre.deak@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4ADC489B18 for ; Thu, 28 Sep 2017 10:06:27 +0000 (UTC) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org T25seSBpbml0IC8gcmVzZXQgdGhlIGRpc3BsYXkgaW50ZXJydXB0cyBkdXJpbmcgcG93ZXIgd2Vs bCBlbmFibGluZyAvCmRpc2FibGluZyBpZiB0aGUgaTkxNSBpbnRlcnJ1cHRzIGFyZSBlbmFibGVk LiBTbyBmYXIgd2UgZGlkIHRoZQppbml0IC8gcmVzZXQgZHVyaW5nIGRyaXZlciBsb2FkaW5nIC8g cmVzdW1pbmcgdG9vLCB3aGVyZQppbml0aWFsaXphdGlvbiAvIGVuYWJsaW5nIG9mIHRoZSBpOTE1 IGludGVycnVwdHMgaGFwcGVucyBvbmx5IGF0IGEgbGF0ZXIKcG9pbnQuIFRoaXMgZGlkbid0IGNh dXNlIGEgcHJvYmxlbSBkdWUgdG8gR0VOOF9NQVNURVJfSVJRX0NPTlRST0wgYmVpbmcKY2xlYXJl ZCwgYnV0IHRyaWdnZXJlZCBnZW4zX2Fzc2VydF9paXJfaXNfemVybygpIGluIEdFTjhfSVJRX0lO SVRfTkRYKCkuCgpSZWZlcmVuY2VzOiBodHRwczovL2J1Z3MuZnJlZWRlc2t0b3Aub3JnL3Nob3df YnVnLmNnaT9pZD0xMDI5ODgKQ2M6IENocmlzIFdpbHNvbiA8Y2hyaXNAY2hyaXMtd2lsc29uLmNv LnVrPgpTaWduZWQtb2ZmLWJ5OiBJbXJlIERlYWsgPGltcmUuZGVha0BpbnRlbC5jb20+Ci0tLQog ZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9pcnEuYyB8IDE0ICsrKysrKysrKysrKysrCiAxIGZp bGUgY2hhbmdlZCwgMTQgaW5zZXJ0aW9ucygrKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2Ry bS9pOTE1L2k5MTVfaXJxLmMgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X2lycS5jCmluZGV4 IGFmODJiZDcyMWRiYy4uZjA0OGFjNDc4MzU1IDEwMDY0NAotLS0gYS9kcml2ZXJzL2dwdS9kcm0v aTkxNS9pOTE1X2lycS5jCisrKyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfaXJxLmMKQEAg LTMxMzIsMTAgKzMxMzIsMTcgQEAgdm9pZCBnZW44X2lycV9wb3dlcl93ZWxsX3Bvc3RfZW5hYmxl KHN0cnVjdCBkcm1faTkxNV9wcml2YXRlICpkZXZfcHJpdiwKIAllbnVtIHBpcGUgcGlwZTsKIAog CXNwaW5fbG9ja19pcnEoJmRldl9wcml2LT5pcnFfbG9jayk7CisKKwlpZiAoIWludGVsX2lycXNf ZW5hYmxlZChkZXZfcHJpdikpIHsKKwkJc3Bpbl91bmxvY2tfaXJxKCZkZXZfcHJpdi0+aXJxX2xv Y2spOworCQlyZXR1cm47CisJfQorCiAJZm9yX2VhY2hfcGlwZV9tYXNrZWQoZGV2X3ByaXYsIHBp cGUsIHBpcGVfbWFzaykKIAkJR0VOOF9JUlFfSU5JVF9ORFgoREVfUElQRSwgcGlwZSwKIAkJCQkg IGRldl9wcml2LT5kZV9pcnFfbWFza1twaXBlXSwKIAkJCQkgIH5kZXZfcHJpdi0+ZGVfaXJxX21h c2tbcGlwZV0gfCBleHRyYV9pZXIpOworCiAJc3Bpbl91bmxvY2tfaXJxKCZkZXZfcHJpdi0+aXJx X2xvY2spOwogfQogCkBAIC0zMTQ1LDggKzMxNTIsMTUgQEAgdm9pZCBnZW44X2lycV9wb3dlcl93 ZWxsX3ByZV9kaXNhYmxlKHN0cnVjdCBkcm1faTkxNV9wcml2YXRlICpkZXZfcHJpdiwKIAllbnVt IHBpcGUgcGlwZTsKIAogCXNwaW5fbG9ja19pcnEoJmRldl9wcml2LT5pcnFfbG9jayk7CisKKwlp ZiAoIWludGVsX2lycXNfZW5hYmxlZChkZXZfcHJpdikpIHsKKwkJc3Bpbl91bmxvY2tfaXJxKCZk ZXZfcHJpdi0+aXJxX2xvY2spOworCQlyZXR1cm47CisJfQorCiAJZm9yX2VhY2hfcGlwZV9tYXNr ZWQoZGV2X3ByaXYsIHBpcGUsIHBpcGVfbWFzaykKIAkJR0VOOF9JUlFfUkVTRVRfTkRYKERFX1BJ UEUsIHBpcGUpOworCiAJc3Bpbl91bmxvY2tfaXJxKCZkZXZfcHJpdi0+aXJxX2xvY2spOwogCiAJ LyogbWFrZSBzdXJlIHdlJ3JlIGRvbmUgcHJvY2Vzc2luZyBkaXNwbGF5IGlycXMgKi8KLS0gCjIu MTMuMgoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50 ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBz Oi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg==