Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: base64
Subject: [tip:ras/core,2/2] x86/mce/AMD: Don't set DEF_INT_TYPE in MSR_CU_DEF_ERR on SMCA systems
From: Borislav Petkov <bp@alien8.de>
Message-Id: <20171204165438.25048-2-bp@alien8.de>
Date: Mon,  4 Dec 2017 17:54:38 +0100
To: X86 ML <x86@kernel.org>
Cc: LKML <linux-kernel@vger.kernel.org>, Tony Luck <tony.luck@intel.com>, linux-edac <linux-edac@vger.kernel.org>
List-ID: <edac.vger.kernel.org>

RnJvbTogWWF6ZW4gR2hhbm5hbSA8eWF6ZW4uZ2hhbm5hbUBhbWQuY29tPgoKVGhlIE1jYUludHJD
ZmcgcmVnaXN0ZXIgKE1TUkMwMDBfMDQxMCksIHByZXZpb3VzbHkga25vd24gYXMKQ1VfREVGRVJf
RVJSLCBpcyB1c2VkIG9uIFNNQ0Egc3lzdGVtcyB0byBzZXQgdGhlIExWVCBvZmZzZXQgZm9yIHRo
ZQpUaHJlc2hvbGQgYW5kIERlZmVycmVkIGVycm9yIGludGVycnVwdHMuCgpUaGlzIHJlZ2lzdGVy
IHdhcyB1c2VkIG9uIG5vbi1TTUNBIHN5c3RlbXMgdG8gYWxzbyBzZXQgdGhlIERlZmVycmVkCmlu
dGVycnVwdCB0eXBlIGluIGJpdHMgMjoxLiBIb3dldmVyLCB0aGVzZSBiaXRzIGFyZSByZXNlcnZl
ZCBvbiBTTUNBCnN5c3RlbXMuCgpPbmx5IHNldCBNU1JDMDAwXzA0MTBbMjoxXSBvbiBub24tU01D
QSBzeXN0ZW1zLgoKU2lnbmVkLW9mZi1ieTogWWF6ZW4gR2hhbm5hbSA8eWF6ZW4uZ2hhbm5hbUBh
bWQuY29tPgpDYzogVG9ueSBMdWNrIDx0b255Lmx1Y2tAaW50ZWwuY29tPgpDYzogbGludXgtZWRh
YyA8bGludXgtZWRhY0B2Z2VyLmtlcm5lbC5vcmc+CkNjOiB4ODYtbWwgPHg4NkBrZXJuZWwub3Jn
PgpMaW5rOiBodHRwOi8vbGttbC5rZXJuZWwub3JnL3IvMjAxNzExMjAxNjI2NDYuNTIxMC0xLVlh
emVuLkdoYW5uYW1AYW1kLmNvbQpTaWduZWQtb2ZmLWJ5OiBCb3Jpc2xhdiBQZXRrb3YgPGJwQHN1
c2UuZGU+Ci0tLQogYXJjaC94ODYva2VybmVsL2NwdS9tY2hlY2svbWNlX2FtZC5jIHwgNCArKyst
CiAxIGZpbGUgY2hhbmdlZCwgMyBpbnNlcnRpb25zKCspLCAxIGRlbGV0aW9uKC0pCgpkaWZmIC0t
Z2l0IGEvYXJjaC94ODYva2VybmVsL2NwdS9tY2hlY2svbWNlX2FtZC5jIGIvYXJjaC94ODYva2Vy
bmVsL2NwdS9tY2hlY2svbWNlX2FtZC5jCmluZGV4IDQ4NmY2NDBiMDJlZi4uYTM4YWIxZmE1M2Ey
IDEwMDY0NAotLS0gYS9hcmNoL3g4Ni9rZXJuZWwvY3B1L21jaGVjay9tY2VfYW1kLmMKKysrIGIv
YXJjaC94ODYva2VybmVsL2NwdS9tY2hlY2svbWNlX2FtZC5jCkBAIC00MDcsNyArNDA3LDkgQEAg
c3RhdGljIHZvaWQgZGVmZXJyZWRfZXJyb3JfaW50ZXJydXB0X2VuYWJsZShzdHJ1Y3QgY3B1aW5m
b194ODYgKmMpCiAJICAgIChkZWZlcnJlZF9lcnJvcl9pbnRfdmVjdG9yICE9IGFtZF9kZWZlcnJl
ZF9lcnJvcl9pbnRlcnJ1cHQpKQogCQlkZWZlcnJlZF9lcnJvcl9pbnRfdmVjdG9yID0gYW1kX2Rl
ZmVycmVkX2Vycm9yX2ludGVycnVwdDsKIAotCWxvdyA9IChsb3cgJiB+TUFTS19ERUZfSU5UX1RZ
UEUpIHwgREVGX0lOVF9UWVBFX0FQSUM7CisJaWYgKCFtY2VfZmxhZ3Muc21jYSkKKwkJbG93ID0g
KGxvdyAmIH5NQVNLX0RFRl9JTlRfVFlQRSkgfCBERUZfSU5UX1RZUEVfQVBJQzsKKwogCXdybXNy
KE1TUl9DVV9ERUZfRVJSLCBsb3csIGhpZ2gpOwogfQogCg==