From: Andes Date: Thu, 15 Mar 2018 13:41:47 +0800 Subject: [U-Boot] [PATCH 1/3] mmc: ftsdc010: Support High-Speed mode Message-ID: <20180315054147.9534-1-uboot@andestech.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Rick Chen ftsdc010 dm driver has been disable High-Speed mode as default to work around Andes AE3XX platform's problem, because of it does not support High-Speed mode in commit id 73cd56b2df213c629191139e5c6705e069b6214f. But other platforms or SoCs maybe support this function. So High-Speed mode can be enabled from dts with cap-mmc-highspeed or cap-sd-highspeed property. Signed-off-by: Rick Chen Signed-off-by: Rick Chen --- drivers/mmc/nds32_mmc.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/mmc/nds32_mmc.c b/drivers/mmc/nds32_mmc.c index 6d3c857..ec43e9d 100644 --- a/drivers/mmc/nds32_mmc.c +++ b/drivers/mmc/nds32_mmc.c @@ -103,6 +103,11 @@ static int nds32_mmc_probe(struct udevice *dev) if (ret < 0) return ret; #endif + + if (dev_read_bool(dev, "cap-mmc-highspeed") || \ + dev_read_bool(dev, "cap-sd-highspeed")) + chip->caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz; + ftsdc_setup_cfg(&plat->cfg, dev->name, chip->buswidth, chip->caps, priv->minmax[1] , priv->minmax[0]); chip->mmc = &plat->mmc; -- 2.7.4