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	for speck@linutronix.de; Mon, 30 Apr 2018 20:54:03 +0200
Date: Mon, 30 Apr 2018 11:53:59 -0700
From: Andi Kleen <ak@linux.intel.com>
Subject: [MODERATED] Re: [patch V8 05/15] SSB 5
Message-ID: <20180430185359.GJ75137@tassilo.jf.intel.com>
References: <20180430150423.180110059@linutronix.de>
 <20180430151232.202750431@linutronix.de>
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To: speck@linutronix.de
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On Mon, Apr 30, 2018 at 05:04:28PM +0200, speck for Thomas Gleixner wrote:
> From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
> 
> It does not do much except show the words 'Vulnerable' for recent x86
> cores. Intel cores prior to Nehalem are known not to be vulnerable, and
> so are some Atoms and some Xeon Phi.

I don't think the description is correct. There are Intel cores before
Nehalem which are vulnerable. But the code is correct as far as I can see.
It mainly checks for older Atom and family < 6, which are really not
vulnerable.

Just say "Intel cores prior to family 6 ..."

-Andi

>  
> +static const __initconst struct x86_cpu_id cpu_no_spec_store_bypass[] = {
> +	{ X86_VENDOR_INTEL,     6, INTEL_FAM6_ATOM_PINEVIEW },
> +	{ X86_VENDOR_INTEL,     6, INTEL_FAM6_ATOM_LINCROFT },
> +	{ X86_VENDOR_INTEL,     6, INTEL_FAM6_ATOM_PENWELL },
> +	{ X86_VENDOR_INTEL,     6, INTEL_FAM6_ATOM_CLOVERVIEW },
> +	{ X86_VENDOR_INTEL,     6, INTEL_FAM6_ATOM_CEDARVIEW },
> +	{ X86_VENDOR_INTEL,     6, INTEL_FAM6_ATOM_SILVERMONT1 },
> +	{ X86_VENDOR_INTEL,     6, INTEL_FAM6_ATOM_AIRMONT },
> +	{ X86_VENDOR_INTEL,     6, INTEL_FAM6_XEON_PHI_KNL },
> +	{ X86_VENDOR_INTEL,     6, INTEL_FAM6_XEON_PHI_KNM },
> +	{ X86_VENDOR_CENTAUR,	5 },
> +	{ X86_VENDOR_INTEL,	5 },
> +	{ X86_VENDOR_NSC,	5 },
> +	{ X86_VENDOR_ANY,	4 },
> +	{}
> +};
> +
>  static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
>  {
>  	u64 ia32_cap = 0;
>  
> +	if (!x86_match_cpu(cpu_no_spec_store_bypass))
> +		setup_force_cpu_bug(X86_BUG_SPEC_STORE_BYPASS);
> +
>  	if (x86_match_cpu(cpu_no_speculation))
>  		return;
>  
> --- a/drivers/base/cpu.c
> +++ b/drivers/base/cpu.c
> @@ -534,14 +534,22 @@ ssize_t __weak cpu_show_spectre_v2(struc
>  	return sprintf(buf, "Not affected\n");
>  }
>  
> +ssize_t __weak cpu_show_spec_store_bypass(struct device *dev,
> +					  struct device_attribute *attr, char *buf)
> +{
> +	return sprintf(buf, "Not affected\n");
> +}
> +
>  static DEVICE_ATTR(meltdown, 0444, cpu_show_meltdown, NULL);
>  static DEVICE_ATTR(spectre_v1, 0444, cpu_show_spectre_v1, NULL);
>  static DEVICE_ATTR(spectre_v2, 0444, cpu_show_spectre_v2, NULL);
> +static DEVICE_ATTR(spec_store_bypass, 0444, cpu_show_spec_store_bypass, NULL);
>  
>  static struct attribute *cpu_root_vulnerabilities_attrs[] = {
>  	&dev_attr_meltdown.attr,
>  	&dev_attr_spectre_v1.attr,
>  	&dev_attr_spectre_v2.attr,
> +	&dev_attr_spec_store_bypass.attr,
>  	NULL
>  };
>  
> --- a/include/linux/cpu.h
> +++ b/include/linux/cpu.h
> @@ -53,6 +53,8 @@ extern ssize_t cpu_show_spectre_v1(struc
>  				   struct device_attribute *attr, char *buf);
>  extern ssize_t cpu_show_spectre_v2(struct device *dev,
>  				   struct device_attribute *attr, char *buf);
> +extern ssize_t cpu_show_spec_store_bypass(struct device *dev,
> +					  struct device_attribute *attr, char *buf);
>  
>  extern __printf(4, 5)
>  struct device *cpu_device_create(struct device *parent, void *drvdata,
>