Return-path: Received: from userp2120.oracle.com ([156.151.31.85]) by Galois.linutronix.de with esmtps (TLS1.2:RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1fFmNq-0003CO-D1 for speck@linutronix.de; Mon, 07 May 2018 22:05:19 +0200 Received: from pps.filterd (userp2120.oracle.com [127.0.0.1]) by userp2120.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w47K0rbD182664 for ; Mon, 7 May 2018 20:05:11 GMT Received: from aserv0021.oracle.com (aserv0021.oracle.com [141.146.126.233]) by userp2120.oracle.com with ESMTP id 2hs5935qcr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Mon, 07 May 2018 20:05:11 +0000 Received: from userv0122.oracle.com (userv0122.oracle.com [156.151.31.75]) by aserv0021.oracle.com (8.14.4/8.14.4) with ESMTP id w47K59Da013786 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Mon, 7 May 2018 20:05:10 GMT Received: from abhmp0018.oracle.com (abhmp0018.oracle.com [141.146.116.24]) by userv0122.oracle.com (8.14.4/8.14.4) with ESMTP id w47K59MC001558 for ; Mon, 7 May 2018 20:05:09 GMT Date: Mon, 7 May 2018 16:05:08 -0400 From: Konrad Rzeszutek Wilk Subject: [MODERATED] Re: Is: bikeshedding the bit name (feedback requested)Was:e: [patch 0/6] SSB update 0 Message-ID: <20180507200508.GA21769@char.us.oracle.com> References: <20180504132317.028193533@linutronix.de> <20180504175238.GA29432@char.us.oracle.com> MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: On Sat, May 05, 2018 at 01:12:49AM +0200, speck for Thomas Gleixner wrote: > On Fri, 4 May 2018, speck for Konrad Rzeszutek Wilk wrote: > > On Fri, May 04, 2018 at 03:34:22PM +0200, speck for Thomas Gleixner wrote: > > > On Fri, 4 May 2018, speck for Thomas Gleixner wrote: > > > > > > > > Applies on top of the master branch. Git bundle follows in separate mail. > > > > > > Attached. > > > > Intel is not exactly sure about the bit name, and has asked the community > > to provide feedback. I will send anything .. umm positive you want me to tell them. > > > > > > @jasonbrandt: > > "This is still undergoing discussion within Intel. RDS was a proposal that we made for feedback. Obviously, it escaped into the wild. The names being considered are MDD, RDS (in particular is it is too late to change it for any of you), RMS (reduced memory speculation), and SSBD. Please tell me if you have strong dislike for any of the names. And thank you for your patience. I thought it was still the case though that the Linux name was SSBD for the general capability. " > > > > My response: > > "@jasonbrandt The boot time parameter is spec_store_bypass_disable= and the various functions/enums use the SSB. Let me communicate your statement to Thomas and Linus"" > > > > I don't think we want to change the spec_store_bypass (SSB) name > anymore. It's a cross architecture term. > > For the bit name in the MSR, I really do not care as long as it is not > completely nonsensical. If we can keep RDS, fine and less churn. " FYI to those who could not attend today's meeting, Intel is changing the name of our SSB mitigation bit in IA32_SPEC_CTL[2] to SSBD (Speculative Store Bypass Disable). " Ugh. Thomas, do you want me to rebase the patches and change all the RDS, and more importantly the commit messages to have this name? Or you prefer a follow on patch to just change it as s/RDS/SSBD/ I am assuming the latter (s/RDS/SSBD), so working on a patch for that.