Date: Mon, 14 May 2018 00:07:15 +0200
From: Borislav Petkov <bp@suse.de>
Subject: [MODERATED] Re: [PATCH v15.3 1/1] [PATCH v15.3] SSB fixup patch #1
Message-ID: <20180513220715.GA7185@pd.tnic>
References: <20180513213403.512079062@localhost.localdomain>
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To: speck@linutronix.de

On Sun, May 13, 2018 at 05:33:57PM -0400, speck for konrad.wilk_at_oracle.com=
 wrote:
> x86/cpu: Make alternative_msr_write work for 32-bit code
>=20
> Cast val and (val >> 32) to uintptr_t, so that they fit in a
> general-purpose register in both 32-bit and 64-bit code.
>=20
> Fixes: c65732e4f721 ("x86/cpu: Restore CPUID_8000_0008_EBX reload")
> Signed-off-by: Jim Mattson <jmattson@google.com>
> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
> ---
>  arch/x86/include/asm/nospec-branch.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>=20
> diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/no=
spec-branch.h
> index 328ea3cb769f..979aa050d311 100644
> --- a/arch/x86/include/asm/nospec-branch.h
> +++ b/arch/x86/include/asm/nospec-branch.h
> @@ -265,8 +265,8 @@ void alternative_msr_write(unsigned int msr, u64 val, u=
nsigned int feature)
>  {
>  	asm volatile(ALTERNATIVE("", "wrmsr", %c[feature])
>  		: : "c" (msr),
> -		    "a" (val),
> -		    "d" (val >> 32),
> +		    "a" ((uintptr_t)val),
> +		    "d" ((uintptr_t)(val >> 32)),

Make those casts (u32) simply as the rest of the MSR code does.

--=20
Regards/Gruss,
    Boris.

SUSE Linux GmbH, GF: Felix Imend=C3=B6rffer, Jane Smithard, Graham Norton, HR=
B 21284 (AG N=C3=BCrnberg)
--=20