Return-path: Received: from aserp2120.oracle.com ([141.146.126.78]) by Galois.linutronix.de with esmtps (TLS1.2:RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1fIxQo-0006yS-Fw for speck@linutronix.de; Wed, 16 May 2018 16:29:31 +0200 Received: from pps.filterd (aserp2120.oracle.com [127.0.0.1]) by aserp2120.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w4GELPmh083092 for ; Wed, 16 May 2018 14:29:23 GMT Received: from userv0022.oracle.com (userv0022.oracle.com [156.151.31.74]) by aserp2120.oracle.com with ESMTP id 2hx29w54fm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Wed, 16 May 2018 14:29:23 +0000 Received: from aserv0121.oracle.com (aserv0121.oracle.com [141.146.126.235]) by userv0022.oracle.com (8.14.4/8.14.4) with ESMTP id w4GETMCB020863 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Wed, 16 May 2018 14:29:22 GMT Received: from abhmp0003.oracle.com (abhmp0003.oracle.com [141.146.116.9]) by aserv0121.oracle.com (8.14.4/8.13.8) with ESMTP id w4GETLEw013683 for ; Wed, 16 May 2018 14:29:21 GMT Date: Wed, 16 May 2018 10:29:20 -0400 From: Konrad Rzeszutek Wilk Subject: [MODERATED] Re: [patch 02/15] SSB updates V17 2 Message-ID: <20180516142920.GI29202@char.us.oracle.com> References: <20180516135132.687640705@linutronix.de> <20180516135209.464746607@linutronix.de> MIME-Version: 1.0 In-Reply-To: <20180516135209.464746607@linutronix.de> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: On Wed, May 16, 2018 at 03:51:34PM +0200, speck for Thomas Gleixner wrote: > Subject: [patch 02/15] x86/speculation: Use synthetic bits for IBRS/IBPB/STIBP > From: Borislav Petkov > > Intel and AMD have different CPUID bits hence for those use synthetic bits > which get set on the respective vendor's in init_speculation_control(). So > that debacles like what he commit message of s/he/the/ > > c65732e4f721 ("x86/cpu: Restore CPUID_8000_0008_EBX reload") > > talks about don't happen anymore.