Return-Path: Received: from mail.linutronix.de (146.0.238.70:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 20 Jun 2018 20:50:14 -0000 Received: from userp2120.oracle.com ([156.151.31.85]) by Galois.linutronix.de with esmtps (TLS1.2:RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1fVk0E-0004Sy-Hx for speck@linutronix.de; Wed, 20 Jun 2018 22:46:55 +0200 Received: from pps.filterd (userp2120.oracle.com [127.0.0.1]) by userp2120.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w5KKiVpf000964 for ; Wed, 20 Jun 2018 20:46:48 GMT Received: from userv0021.oracle.com (userv0021.oracle.com [156.151.31.71]) by userp2120.oracle.com with ESMTP id 2jmu6xx56f-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Wed, 20 Jun 2018 20:46:47 +0000 Received: from aserv0121.oracle.com (aserv0121.oracle.com [141.146.126.235]) by userv0021.oracle.com (8.14.4/8.14.4) with ESMTP id w5KKkl8w003832 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Wed, 20 Jun 2018 20:46:47 GMT Received: from abhmp0008.oracle.com (abhmp0008.oracle.com [141.146.116.14]) by aserv0121.oracle.com (8.14.4/8.13.8) with ESMTP id w5KKklHZ009745 for ; Wed, 20 Jun 2018 20:46:47 GMT Message-Id: <20180620204352.134174608@localhost.localdomain> Date: Wed, 20 Jun 2018 16:43:02 -0400 From: konrad.wilk@oracle.com Subject: [MODERATED] [PATCH v2.1 6/6] [PATCH v2.1 6/6] Patch #6 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: Right before we do an VMENTER we need to flush the L1 data cache to thwart against untrusted guests reading the host memory that is cached in L1 data cache. Signed-off-by: Konrad Rzeszutek Wilk --- arch/x86/kvm/x86.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index c0079aae38ba..b7ee35b1e251 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -58,6 +58,7 @@ #include +#include #include #include #include @@ -6550,8 +6551,15 @@ static void *__read_mostly empty_zero_pages; void kvm_l1d_flush(void) { + int size; + + if (static_cpu_has(X86_FEATURE_FLUSH_L1D)) { + x86_flush_l1d(); + return; + } + /* FIXME: could this be boot_cpu_data.x86_cache_size * 2? */ - int size = PAGE_SIZE << L1D_CACHE_ORDER; + size = PAGE_SIZE << L1D_CACHE_ORDER; asm volatile( /* First ensure the pages are in the TLB */ "xorl %%eax, %%eax\n\t" -- 2.14.3