From: Jagan Teki Date: Mon, 16 Jul 2018 16:58:24 +0530 Subject: [U-Boot] [RFC 09/35] sunxi: clk: add DM clock driver template for the A64 SoC In-Reply-To: <20180716112850.3961-1-jagan@amarulasolutions.com> References: <20180716112850.3961-1-jagan@amarulasolutions.com> Message-ID: <20180716112850.3961-10-jagan@amarulasolutions.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Andre Przywara Create the template for a new DM clock driver for the Allwinner A64 SoC. Signed-off-by: Andre Przywara Signed-off-by: Jagan Teki --- drivers/clk/Makefile | 1 + drivers/clk/sunxi/Makefile | 7 ++++ drivers/clk/sunxi/clk_a64.c | 77 +++++++++++++++++++++++++++++++++++++ 3 files changed, 85 insertions(+) create mode 100644 drivers/clk/sunxi/Makefile create mode 100644 drivers/clk/sunxi/clk_a64.c diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 426c67db9b..5944b9bbb5 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -11,6 +11,7 @@ obj-y += tegra/ obj-$(CONFIG_ARCH_ASPEED) += aspeed/ obj-$(CONFIG_ARCH_MESON) += clk_meson.o obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ +obj-$(CONFIG_ARCH_SUNXI) += sunxi/ obj-$(CONFIG_CLK_AT91) += at91/ obj-$(CONFIG_CLK_MVEBU) += mvebu/ obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile new file mode 100644 index 0000000000..6cf122c634 --- /dev/null +++ b/drivers/clk/sunxi/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (c) 2018 Arm Ltd. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-$(CONFIG_MACH_SUN50I) += clk_a64.o diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c new file mode 100644 index 0000000000..77afbcafd3 --- /dev/null +++ b/drivers/clk/sunxi/clk_a64.c @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * (C) Copyright 2018 Arm Ltd. + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include +#include +#include +#include +#include +#include +#include + +struct a64_clk_priv { + void *base; +}; + +static ulong a64_clk_get_rate(struct clk *clk) +{ + debug("%s(#%ld)\n", __func__, clk->id); + + debug(" unhandled\n"); + return -EINVAL; +} + +static ulong a64_clk_set_rate(struct clk *clk, ulong rate) +{ + debug("%s(#%ld, rate: %lu)\n", __func__, clk->id, rate); + + debug(" unhandled\n"); + return -EINVAL; +} + +static int a64_clk_enable(struct clk *clk) +{ + debug("%s(#%ld)\n", __func__, clk->id); + + debug(" unhandled\n"); + return -EINVAL; +} + +static struct clk_ops a64_clk_ops = { + .get_rate = a64_clk_get_rate, + .set_rate = a64_clk_set_rate, + .enable = a64_clk_enable, +}; + +static int a64_clk_probe(struct udevice *dev) +{ + return 0; +} + +static int a64_clk_ofdata_to_platdata(struct udevice *dev) +{ + struct a64_clk_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + + return 0; +} + +static const struct udevice_id a64_clk_ids[] = { + { .compatible = "allwinner,sun50i-a64-ccu" }, + { } +}; + +U_BOOT_DRIVER(clk_sun50i_a64) = { + .name = "sun50i_a64_ccu", + .id = UCLASS_CLK, + .of_match = a64_clk_ids, + .priv_auto_alloc_size = sizeof(struct a64_clk_priv), + .ofdata_to_platdata = a64_clk_ofdata_to_platdata, + .ops = &a64_clk_ops, + .probe = a64_clk_probe, +}; -- 2.17.1