From: Jagan Teki Date: Mon, 16 Jul 2018 16:58:26 +0530 Subject: [U-Boot] [RFC 11/35] clk: sunxi: a64: Add disable function In-Reply-To: <20180716112850.3961-1-jagan@amarulasolutions.com> References: <20180716112850.3961-1-jagan@amarulasolutions.com> Message-ID: <20180716112850.3961-12-jagan@amarulasolutions.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Add clock disable function for clearing register bits. Signed-off-by: Jagan Teki --- drivers/clk/sunxi/clk_a64.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c index 77afbcafd3..fb9dec3173 100644 --- a/drivers/clk/sunxi/clk_a64.c +++ b/drivers/clk/sunxi/clk_a64.c @@ -41,10 +41,19 @@ static int a64_clk_enable(struct clk *clk) return -EINVAL; } +static int a64_clk_disable(struct clk *clk) +{ + debug("%s(#%ld)\n", __func__, clk->id); + + debug(" unhandled\n"); + return -EINVAL; +} + static struct clk_ops a64_clk_ops = { .get_rate = a64_clk_get_rate, .set_rate = a64_clk_set_rate, .enable = a64_clk_enable, + .disable = a64_clk_disable, }; static int a64_clk_probe(struct udevice *dev) -- 2.17.1