From: Jim Qu Subject: [PATCH] drm/amdgpu: set WRITE_BURST_LENGTH to 64B to workaround SDMA1 hang Date: Tue, 18 Dec 2018 11:02:20 +0800 Message-ID: <20181218030220.16044-1-Jim.Qu@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "amd-gfx" To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Cc: Jim Qu ZWZmZWN0IGFzaWNzOiBWRUdBMTAgYW5kIFZFR0ExMgoKQ2hhbmdlLUlkOiBJZGZhYzMxNTkyMGE0 ZmFlNzcxYjA4MGZmODM2YmQ0YzVjOTgwMzQ4ZQpTaWduZWQtb2ZmLWJ5OiBKaW0gUXUgPEppbS5R dUBhbWQuY29tPgpBY2tlZC1ieTogQWxleCBEZXVjaGVyIDxhbGV4YW5kZXIuZGV1Y2hlckBhbWQu Y29tPgotLS0KIGRyaXZlcnMvZ3B1L2RybS9hbWQvYW1kZ3B1L3NkbWFfdjRfMC5jIHwgMyArKy0K IDEgZmlsZSBjaGFuZ2VkLCAyIGluc2VydGlvbnMoKyksIDEgZGVsZXRpb24oLSkKCmRpZmYgLS1n aXQgYS9kcml2ZXJzL2dwdS9kcm0vYW1kL2FtZGdwdS9zZG1hX3Y0XzAuYyBiL2RyaXZlcnMvZ3B1 L2RybS9hbWQvYW1kZ3B1L3NkbWFfdjRfMC5jCmluZGV4IGE5NzNkZWE3YjI0Mi4uZmYyNGI4YTYx N2EzIDEwMDY0NAotLS0gYS9kcml2ZXJzL2dwdS9kcm0vYW1kL2FtZGdwdS9zZG1hX3Y0XzAuYwor KysgYi9kcml2ZXJzL2dwdS9kcm0vYW1kL2FtZGdwdS9zZG1hX3Y0XzAuYwpAQCAtNzgsNyArNzgs NiBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IHNvYzE1X3JlZ19nb2xkZW4gZ29sZGVuX3NldHRpbmdz X3NkbWFfNFtdID0gewogCVNPQzE1X1JFR19HT0xERU5fVkFMVUUoU0RNQTAsIDAsIG1tU0RNQTBf UkxDMV9SQl9XUFRSX1BPTExfQ05UTCwgMHgwMDAwZmZmMCwgMHgwMDQwMzAwMCksCiAJU09DMTVf UkVHX0dPTERFTl9WQUxVRShTRE1BMCwgMCwgbW1TRE1BMF9VVENMMV9QQUdFLCAweDAwMDAwM2Zm LCAweDAwMDAwM2MwKSwKIAlTT0MxNV9SRUdfR09MREVOX1ZBTFVFKFNETUEwLCAwLCBtbVNETUEw X1VUQ0wxX1dBVEVSTUssIDB4ZmMwMDAwMDAsIDB4MDAwMDAwMDApLAotCVNPQzE1X1JFR19HT0xE RU5fVkFMVUUoU0RNQTEsIDAsIG1tU0RNQTFfQ0hJQ0tFTl9CSVRTLCAweGZlOTMxZjA3LCAweDAy ODMxZjA3KSwKIAlTT0MxNV9SRUdfR09MREVOX1ZBTFVFKFNETUExLCAwLCBtbVNETUExX0NMS19D VFJMLCAweGZmZmZmZmZmLCAweDNmMDAwMTAwKSwKIAlTT0MxNV9SRUdfR09MREVOX1ZBTFVFKFNE TUExLCAwLCBtbVNETUExX0dGWF9JQl9DTlRMLCAweDgwMGYwMTAwLCAweDAwMDAwMTAwKSwKIAlT T0MxNV9SRUdfR09MREVOX1ZBTFVFKFNETUExLCAwLCBtbVNETUExX0dGWF9SQl9XUFRSX1BPTExf Q05UTCwgMHgwMDAwZmZmMCwgMHgwMDQwMzAwMCksCkBAIC05Niw2ICs5NSw3IEBAIHN0YXRpYyBj b25zdCBzdHJ1Y3Qgc29jMTVfcmVnX2dvbGRlbiBnb2xkZW5fc2V0dGluZ3Nfc2RtYV80W10gPSB7 CiBzdGF0aWMgY29uc3Qgc3RydWN0IHNvYzE1X3JlZ19nb2xkZW4gZ29sZGVuX3NldHRpbmdzX3Nk bWFfdmcxMFtdID0gewogCVNPQzE1X1JFR19HT0xERU5fVkFMVUUoU0RNQTAsIDAsIG1tU0RNQTBf R0JfQUREUl9DT05GSUcsIDB4MDAxODc3M2YsIDB4MDAxMDQwMDIpLAogCVNPQzE1X1JFR19HT0xE RU5fVkFMVUUoU0RNQTAsIDAsIG1tU0RNQTBfR0JfQUREUl9DT05GSUdfUkVBRCwgMHgwMDE4Nzcz ZiwgMHgwMDEwNDAwMiksCisJU09DMTVfUkVHX0dPTERFTl9WQUxVRShTRE1BMSwgMCwgbW1TRE1B MV9DSElDS0VOX0JJVFMsIDB4ZmU5MzFmMDcsIDB4MDI4MzFkMDcpLAogCVNPQzE1X1JFR19HT0xE RU5fVkFMVUUoU0RNQTEsIDAsIG1tU0RNQTFfR0JfQUREUl9DT05GSUcsIDB4MDAxODc3M2YsIDB4 MDAxMDQwMDIpLAogCVNPQzE1X1JFR19HT0xERU5fVkFMVUUoU0RNQTEsIDAsIG1tU0RNQTFfR0Jf QUREUl9DT05GSUdfUkVBRCwgMHgwMDE4NzczZiwgMHgwMDEwNDAwMikKIH07CkBAIC0xMDMsNiAr MTAzLDcgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBzb2MxNV9yZWdfZ29sZGVuIGdvbGRlbl9zZXR0 aW5nc19zZG1hX3ZnMTBbXSA9IHsKIHN0YXRpYyBjb25zdCBzdHJ1Y3Qgc29jMTVfcmVnX2dvbGRl biBnb2xkZW5fc2V0dGluZ3Nfc2RtYV92ZzEyW10gPSB7CiAJU09DMTVfUkVHX0dPTERFTl9WQUxV RShTRE1BMCwgMCwgbW1TRE1BMF9HQl9BRERSX0NPTkZJRywgMHgwMDE4NzczZiwgMHgwMDEwNDAw MSksCiAJU09DMTVfUkVHX0dPTERFTl9WQUxVRShTRE1BMCwgMCwgbW1TRE1BMF9HQl9BRERSX0NP TkZJR19SRUFELCAweDAwMTg3NzNmLCAweDAwMTA0MDAxKSwKKwlTT0MxNV9SRUdfR09MREVOX1ZB TFVFKFNETUExLCAwLCBtbVNETUExX0NISUNLRU5fQklUUywgMHhmZTkzMWYwNywgMHgwMjgzMWQw NyksCiAJU09DMTVfUkVHX0dPTERFTl9WQUxVRShTRE1BMSwgMCwgbW1TRE1BMV9HQl9BRERSX0NP TkZJRywgMHgwMDE4NzczZiwgMHgwMDEwNDAwMSksCiAJU09DMTVfUkVHX0dPTERFTl9WQUxVRShT RE1BMSwgMCwgbW1TRE1BMV9HQl9BRERSX0NPTkZJR19SRUFELCAweDAwMTg3NzNmLCAweDAwMTA0 MDAxKQogfTsKLS0gCjIuMTcuMQoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX18KYW1kLWdmeCBtYWlsaW5nIGxpc3QKYW1kLWdmeEBsaXN0cy5mcmVlZGVza3Rv cC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9hbWQt Z2Z4Cg==