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[47.55.120.4]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-88d9623fd14sm20785516d6.8.2025.12.19.07.14.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Dec 2025 07:14:35 -0800 (PST) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1vWcBe-00000001YYV-2m7p; Fri, 19 Dec 2025 11:14:34 -0400 Date: Fri, 19 Dec 2025 11:14:34 -0400 From: Jason Gunthorpe To: Boris Brezillon Cc: Alice Ryhl , Miguel Ojeda , Will Deacon , Daniel Almeida , Robin Murphy , Boqun Feng , Gary Guo , =?utf-8?B?QmrDtnJu?= Roy Baron , Benno Lossin , Andreas Hindborg , Trevor Gross , Danilo Krummrich , Joerg Roedel , Lorenzo Stoakes , "Liam R. Howlett" , Asahi Lina , linux-kernel@vger.kernel.org, rust-for-linux@vger.kernel.org, iommu@lists.linux.dev, linux-mm@kvack.org Subject: Re: [PATCH v4] io: add io_pgtable abstraction Message-ID: <20251219151434.GI31492@ziepe.ca> References: <20251219-io-pgtable-v4-1-68aaa7a40380@google.com> <20251219140557.GH31492@ziepe.ca> <20251219161153.420d1c46@fedora> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20251219161153.420d1c46@fedora> On Fri, Dec 19, 2025 at 04:11:53PM +0100, Boris Brezillon wrote: > There's actually a confusion between TLB invalidation and L1/L2 cache > flush/invalidation. The things we can decide to flush/invalidate around > map/unmap ops are L1/L2 caches. The TLB invalidate, we don't have > direct control on: it happens as part of the LOCK+UNLOCK sequence, and > no matter what you execute (map or unmap), you have to surround it with > a LOCK/UNLOCK to provide support for atomic updates (GPU is blocked if > anything accesses the locked range while an update is on-going). That makes more sense, so these GPU drivers just flush the entire TLB every time they change it - built into the UNLOCK operation? Sounds slow, but is a reasonable explanation why they don't use the callbacks. Jason