From: Alex Dubov <oakad@yahoo.com>
Date: Tue, 4 Aug 2009 20:09:54 -0700 (PDT)
Subject: [U-Boot] [PATCH] stx: create common vendor hierarchy for
	Silicon Turnkey boards
In-Reply-To: <20090804205439.8AC228340728@gemini.denx.de>
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> > 
> > Move board definition files for STx XTC, GP3 and SSA
> boards into
> > common subdirectory and factor out common code.
> > 
> > "-mno-spe" flag common to all MPC85xx configurations
> does not work
> > so change it to "-mspe=no" which does (GCC bug
> 37759).
> > 
> > Signed-off-by: Alex Dubov <oakad@yahoo.com>
> ...
> > --- a/board/stxgp3/Makefile
> > +++ b/board/stx/common/Makefile
> > @@ -1,5 +1,5 @@
> >? #
> > -# (C) Copyright 2001-2006
> > +# (C) Copyright 2006
> >? # Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> 
> How comes?

Git is confused somehow.
I don't see this change in my tree.

> 
> > @@ -31,30 +31,34 @@
> >???* LAW(Local Access Window)
> configuration:
> >???*
> >???* 0x0000_0000?
> ???0x7fff_ffff?
> ???DDR? ? ? ? ?
> ? ? ? ? ???2G
> > - * 0x8000_0000?
> ???0x9fff_ffff? ???PCI1
> MEM? ? ? ? ? ? ? ?
> 512M
> > - * 0xa000_0000?
> ???0xbfff_ffff? ???PCI2
> MEM? ? ? ? ? ? ? ?
> 512M
> > + * 0x8000_0000?
> ???0x9fff_ffff?
> ???PCI1? ? ? ? ?
> ? ? ? ? ? 512M
> > + * 0xa000_0000?
> ???0xbfff_ffff?
> ???PCI2? ? ? ? ?
> ? ? ? ? ? 512M
> > + * 0xc000_0000?
> ???0xdfff_ffff?
> ???RapidIO? ? ? ? ?
> ? ? ???512M
> >???* 0xe000_0000?
> ???0xe000_ffff?
> ???CCSR? ? ? ? ?
> ? ? ? ? ? 1M
> >???* 0xe200_0000?
> ???0xe2ff_ffff? ???PCI1
> IO? ? ? ? ? ? ?
> ???16M
> >???* 0xe300_0000?
> ???0xe3ff_ffff? ???PCI2
> IO? ? ? ? ? ? ?
> ???16M
> > - * 0xf000_0000?
> ???0xfaff_ffff? ???Local
> bus? ? ? ? ? ?
> ???128M
> > - * 0xfb00_0000?
> ???0xfb00_ffff? ???Config
> Latch? ? ? ? ? ? 64K
> > - * 0xfc00_0000?
> ???0xffff_ffff? ???FLASH
> (boot bank)? ? ???64M
> > + * 0xf000_0000?
> ???0xffff_ffff? ???LBC
> options + FLASH? ???256M
> 
> Are you sure this is correct?

Yes, this will cover all three boards affected by the change.
They all have their address maps set in similar fashion.


> 
> >? struct law_entry law_table[] = {
> > -#ifndef CONFIG_SPD_EEPROM
> > -??? SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE,
> LAW_SIZE_128M, LAW_TRGT_IF_DDR),
> > +#ifdef CONFIG_SYS_PCI1_MEM_PHYS
> > +??? SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS,
> LAW_SIZE_512M, LAW_TRGT_IF_PCI),
> > +??? SET_LAW(CONFIG_SYS_PCI1_IO_PHYS,
> LAW_SIZE_16M, LAW_TRGT_IF_PCI),
> >? #endif
> > -??? SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS,
> LAW_SIZE_512M, LAW_TRGT_IF_PCI_1),
> > +#ifdef CONFIG_SYS_PCI2_MEM_PHYS
> >? ???
> SET_LAW(CONFIG_SYS_PCI2_MEM_PHYS, LAW_SIZE_512M,
> LAW_TRGT_IF_PCI_2),
> > -??? SET_LAW(CONFIG_SYS_PCI1_IO_PHYS,
> LAW_SIZE_16M, LAW_TRGT_IF_PCI_1),
> >? ???
> SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_16M,
> LAW_TRGT_IF_PCI_2),
> > -??? /* Map the whole localbus,
> including flash and reset latch. */
> > -???
> SET_LAW(CONFIG_SYS_LBC_OPTION_BASE, LAWAR_SIZE_256M,
> LAW_TRGT_IF_LBC),
> > +#endif
> > +#ifdef CONFIG_SYS_RIO_MEM_PHYS
> > +??? SET_LAW(CONFIG_SYS_RIO_MEM_PHYS,
> LAW_SIZE_512M, LAW_TRGT_IF_RIO),
> > +#endif
> > +???
> SET_LAW(CONFIG_SYS_LBC_OPTION_BASE, LAWAR_SIZE_256M,
> LAW_TRGT_IF_LBC)
> >? };
> 
> This looks fishy, too.

Just look at the respective boards' law.c files before the patch.
They all have this entry, either called CONFIG_SYS_LBC_OPTION_BASE or
CONFIG_SYS_LBC_SDRAM_BASE.


> > @@ -31,76 +31,90 @@ struct fsl_e_tlb_entry tlb_table[]
> = {
> >? ??? SET_TLB_ENTRY(0,
> CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR,
> >? ??? ??? ?
> ? ? MAS3_SX|MAS3_SW|MAS3_SR, 0,
> >? ??? ??? ?
> ? ? 0, 0, BOOKE_PAGESZ_4K, 0),
> > -??? SET_TLB_ENTRY(0,
> CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024 ,
> CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024,
> > +??? SET_TLB_ENTRY(0,
> CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024,
> > +??? ??? ? ?
> ? CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024,
> >? ??? ??? ?
> ? ? MAS3_SX|MAS3_SW|MAS3_SR, 0,
> >? ??? ??? ?
> ? ? 0, 0, BOOKE_PAGESZ_4K, 0),
> > -??? SET_TLB_ENTRY(0,
> CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024 ,
> CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024,
> > +??? SET_TLB_ENTRY(0,
> CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024,
> > +??? ??? ? ?
> ? CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024,
> >? ??? ??? ?
> ? ? MAS3_SX|MAS3_SW|MAS3_SR, 0,
> >? ??? ??? ?
> ? ? 0, 0, BOOKE_PAGESZ_4K, 0),
> > -??? SET_TLB_ENTRY(0,
> CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024 ,
> CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024,
> > +??? SET_TLB_ENTRY(0,
> CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024,
> > +??? ??? ? ?
> ? CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024,
> >? ??? ??? ?
> ? ? MAS3_SX|MAS3_SW|MAS3_SR, 0,
> >? ??? ??? ?
> ? ? 0, 0, BOOKE_PAGESZ_4K, 0),
> 
> Better split code beautifying into separate patch.

I wrote this file from scratch.
Git is confused here.
There's no separate patch.
Same for the other issues here and below.

> 
> 
> Hm... did you actually test these changes on all 4 boards?

There are no real changes. All three boards have nearly identical configs.
stxxtc is only copied around and is not affected by this (no tlbs or law
there).