From: "Ling, Xiaofeng" Subject: [PATCH] hide 64bit mode Date: Fri, 16 Dec 2005 15:33:30 +0800 Message-ID: <43A26DCA.9070809@intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="------------040504050907060705020609" Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: xen-devel List-Id: xen-devel@lists.xenproject.org This is a multi-part message in MIME format. --------------040504050907060705020609 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit hide 64bit mode on i386 hypervisor and guest. Signed-off-by: Xiaofeng Ling --------------040504050907060705020609 Content-Type: text/x-patch; name="cpuidem64t.patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="cpuidem64t.patch" # HG changeset patch # User Xiaofeng Ling # Node ID 24f89f563f46b72382731e692d702b1e629201f0 # Parent e035a8b7cfcc5e9d581da7df380d5107310e6a6b hide 64bit mode on an i386 guest. Signed-off-by: Xiaofeng Ling diff -r e035a8b7cfcc -r 24f89f563f46 xen/arch/x86/vmx.c --- a/xen/arch/x86/vmx.c Fri Dec 16 06:10:48 2005 +0800 +++ b/xen/arch/x86/vmx.c Fri Dec 16 15:05:43 2005 +0800 @@ -553,6 +553,13 @@ ecx &= ~VMX_VCPU_CPUID_L1_RESERVED; /* mask off reserved bits */ clear_bit(X86_FEATURE_VMXE & 31, &ecx); clear_bit(X86_FEATURE_MWAIT & 31, &ecx); +#ifdef __i386__ + } + else if (input == 0x80000001) + { + /* mask feature for Intel ia32e or AMD long mode*/ + clear_bit(X86_FEATURE_LM & 31, &edx); +#endif } regs->eax = (unsigned long) eax; --------------040504050907060705020609 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel --------------040504050907060705020609--