Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1J3ypN-0002eF-2t for qemu-devel@nongnu.org; Sun, 16 Dec 2007 14:07:05 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1J3ypL-0002dd-6F for qemu-devel@nongnu.org; Sun, 16 Dec 2007 14:07:04 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1J3ypK-0002dY-Vh for qemu-devel@nongnu.org; Sun, 16 Dec 2007 14:07:03 -0500 Received: from gateway-1237.mvista.com ([63.81.120.158]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1J3ypK-0006pv-0E for qemu-devel@nongnu.org; Sun, 16 Dec 2007 14:07:02 -0500 Received: from pahoa.hi.kama-aina.net (unknown [10.235.20.2]) by hermes.mvista.com (Postfix) with ESMTP id E63291F1DA for ; Sun, 16 Dec 2007 11:06:58 -0800 (PST) Message-ID: <47657752.9060205@kama-aina.net> Date: Sun, 16 Dec 2007 09:06:58 -1000 From: Armin MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------000700000104060000080405" Subject: [Qemu-devel] [Patch 2/2] switch support, Mainstone v2 Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org This is a multi-part message in MIME format. --------------000700000104060000080405 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Mainstone patch against latest cvs. -Armin --------------000700000104060000080405 Content-Type: text/x-patch; name="mst_switches.patch" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="mst_switches.patch" Index: qemu_dev/hw/mainstone.c =================================================================== --- qemu_dev.orig/hw/mainstone.c +++ qemu_dev/hw/mainstone.c @@ -87,33 +87,31 @@ static void mainstone_common_init(int ra /* Setup initial (reset) machine state */ cpu->env->regs[15] = PXA2XX_SDRAM_BASE; - /* There are two 32MiB flash devices on the board */ + /* There are two 32MiB flash devices on the board + * switch #7 governs which bank to use + */ index = drive_get_index(IF_PFLASH, 0, 0); if (index == -1) { - fprintf(stderr, "Two flash images must be given with the " + fprintf(stderr, "One flash image must be given with the " "'pflash' parameter\n"); exit(1); } - if (!pflash_cfi01_register(MST_FLASH_0, - mainstone_ram + PXA2XX_INTERNAL_SIZE, - drives_table[index].bdrv, - 256 * 1024, 128, 4, 0, 0, 0, 0)) { - fprintf(stderr, "qemu: Error registering flash memory.\n"); - exit(1); - } - - index = drive_get_index(IF_PFLASH, 0, 1); - if (index == -1) { - fprintf(stderr, "Two flash images must be given with the " - "'pflash' parameter\n"); - exit(1); - } - if (!pflash_cfi01_register(MST_FLASH_1, - mainstone_ram + PXA2XX_INTERNAL_SIZE, - drives_table[index].bdrv, - 256 * 1024, 128, 4, 0, 0, 0, 0)) { - fprintf(stderr, "qemu: Error registering flash memory.\n"); - exit(1); + if(switch_get_value(CFG_SPDT_SWITCH, 7)) { + if (!pflash_cfi01_register(MST_FLASH_0, + mainstone_ram + PXA2XX_INTERNAL_SIZE, + drives_table[index].bdrv, + 256 * 1024, 128, 4, 0, 0, 0, 0)) { + fprintf(stderr, "qemu: Error registering flash memory.\n"); + exit(1); + } + } else { + if (!pflash_cfi01_register(MST_FLASH_1, + mainstone_ram + PXA2XX_INTERNAL_SIZE, + drives_table[index].bdrv, + 256 * 1024, 128, 4, 0, 0, 0, 0)) { + fprintf(stderr, "qemu: Error registering flash memory.\n"); + exit(1); + } } mst_irq = mst_irq_init(cpu, MST_FPGA_PHYS, PXA2XX_PIC_GPIO_0); --------------000700000104060000080405--