From: "Jan Beulich" Subject: [PATCH] vmx: fix debugctl handling Date: Fri, 14 Mar 2008 13:29:40 +0000 Message-ID: <47DA8BD4.76E4.0078.0@novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable Return-path: Content-Disposition: inline List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: xen-devel@lists.xensource.com List-Id: xen-devel@lists.xenproject.org I recently realized that the original way of dealing with the DebugCtl MSR on VMX failed to make use of the dedicated guest VMCS field. This is being fixed with this patch. What is puzzling me to a certain degree is that while there is a guest VMCS field for this MSR, there's no equivalent host load field, but there's also no indication that the MSR would be cleared during a vmexit. Can someone at Intel perhaps give a statement on this? I would really be possible to avoid the intercept on DebugCtl reads altogether, but that would require new support functions to individually disable read and write intercepts (which currently are always handled as a pair). I'm not sure such a change is warranted for a debugging only feature. Signed-off-by: Jan Beulich Index: 2008-03-05/xen/arch/x86/hvm/vmx/vmcs.c =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- 2008-03-05.orig/xen/arch/x86/hvm/vmx/vmcs.c 2008-02-18 10:07:45.0000000= 00 +0100 +++ 2008-03-05/xen/arch/x86/hvm/vmx/vmcs.c 2008-03-14 14:08:11.0000000= 00 +0100 @@ -870,7 +870,7 @@ void vmcs_dump_vcpu(struct vcpu *v) x =3D (unsigned long long)vmr(TSC_OFFSET_HIGH) << 32; x |=3D (uint32_t)vmr(TSC_OFFSET); printk("TSC Offset =3D %016llx\n", x); - x =3D (unsigned long long)vmr(GUEST_IA32_DEBUGCTL) << 32; + x =3D (unsigned long long)vmr(GUEST_IA32_DEBUGCTL_HIGH) << 32; x |=3D (uint32_t)vmr(GUEST_IA32_DEBUGCTL); printk("DebugCtl=3D%016llx DebugExceptions=3D%016llx\n", x, (unsigned long long)vmr(GUEST_PENDING_DBG_EXCEPTIONS)); Index: 2008-03-05/xen/arch/x86/hvm/vmx/vmx.c =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- 2008-03-05.orig/xen/arch/x86/hvm/vmx/vmx.c 2008-02-26 10:43:52.0000000= 00 +0100 +++ 2008-03-05/xen/arch/x86/hvm/vmx/vmx.c 2008-03-14 14:14:40.0000000= 00 +0100 @@ -1512,8 +1512,10 @@ static int vmx_msr_read_intercept(struct msr_content =3D var_range_base[index]; break; case MSR_IA32_DEBUGCTLMSR: - if ( vmx_read_guest_msr(v, ecx, &msr_content) !=3D 0 ) - msr_content =3D 0; + msr_content =3D __vmread(GUEST_IA32_DEBUGCTL); +#ifdef __i386__ + msr_content |=3D (u64)__vmread(GUEST_IA32_DEBUGCTL_HIGH) << 32; +#endif break; case MSR_IA32_VMX_BASIC...MSR_IA32_VMX_PROCBASED_CTLS2: goto gp_fault; @@ -1732,11 +1734,15 @@ static int vmx_msr_write_intercept(struc } =20 if ( (rc < 0) || - (vmx_add_guest_msr(v, ecx) < 0) || (vmx_add_host_load_msr(v, ecx) < 0) ) vmx_inject_hw_exception(v, TRAP_machine_check, 0); else - vmx_write_guest_msr(v, ecx, msr_content); + { + __vmwrite(GUEST_IA32_DEBUGCTL, msr_content); +#ifdef __i386__ + __vmwrite(GUEST_IA32_DEBUGCTL_HIGH, msr_content >> 32); +#endif + } =20 break; }