From: Daniel Hellstrom Date: Fri, 28 Mar 2008 14:04:28 +0100 Subject: [U-Boot-Users] [PATCH] SPARC: CFI flash_read64 defined weak function. Message-ID: <47ECECDC.3000703@gaisler.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hello Wolfgang and Stefan, This is a patch which defines flash_read64 weak in cfi_flash.c, cpu/leon3/cpu_init.c defines this function for SPARC. SPARC has implemented __raw_readq, it reads 64-bit from any 32-bit address. For current SPARC architectures (LEON2 and LEON3) each read from the FLASH must lead to a cache miss. This is because FLASH can not be set non-cacheable since program code resides there, and alternatively disabling cache is poor from performance view, or doing a cache flush between each read is even poorer. Forcing a cache miss on a SPARC is done by a special instruction "lda" - load alternative space, the alternative space number (ASI) is processor implementation specific and can be found in . This patch is also available at ftp://ftp.gaisler.com/gaisler.com/uboot/patches. Best Regards, Daniel Hellstrom drivers/mtd/cfi_flash.c | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --cc drivers/mtd/cfi_flash.c index f04c72d,f04c72d..a55afc9 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@@ -239,12 -239,12 +239,14 @@@ static u32 flash_read32(void *addr return __raw_readl(addr); } --static u64 flash_read64(void *addr) ++static u64 __flash_read64(void *addr) { /* No architectures currently implement __raw_readq() */ return *(volatile u64 *)addr; } ++u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64"))); ++ /*----------------------------------------------------------------------- */ #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)