From: Rogan Dawes Date: Tue, 20 Jul 2010 12:29:48 +0200 Subject: [U-Boot] Non standard CFI detection tweaks In-Reply-To: <4C457900.2020200@emk-elektronik.de> References: <4C3CC5E5.1040606@dawes.za.net> <201007191533.37947.sr@denx.de> <4C446314.7040702@dawes.za.net> <201007200958.33622.sr@denx.de> <4C456073.3000706@dawes.za.net> <4C4573BF.40405@dawes.za.net> <4C457900.2020200@emk-elektronik.de> Message-ID: <4C457A9C.4020403@dawes.za.net> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 2010/07/20 12:22 PM, Reinhard Meyer (-VC) wrote: > Rogan Dawes schrieb: >> Unfortunately, but understandably, it makes no difference whatsoever to >> the behaviour of the flash chip. I can still put it into QRY mode, where >> I get the doubled QQRRYY response, but the flash is not detected any >> better than it was previously. > OOPS: > > On our system (top5200) the behaviour is exactly as yours: > > => mm.b ff0000aa > ff0000aa: 00 ? 98 > ff0000ab: 00 ? . > => md.l ff000000 > ff000000: 00000000 00000000 00000000 00000000 ................ > ff000010: 00000000 00000000 00000000 00000000 ................ > ff000020: 51515252 59590202 00004040 00000000 QQRRYY....@@.... > => > > But because of other constraints and since the port was done in 2003 > we never tried to use the CFI driver ;) > (our flash has 64MB but only the first 16 MB are memory mapped.) > > Hardware: Spansion 29GL512 in 8-Bit mode, that means > Flash D15/A(-1) connected to CPU A0 > Flash A0 connected to CPU A1 > Flash A1 connected to CPU A2 > etc... > > You might want to look at board/emk/common/flash.c for insights :) > > Reinhard I'll do that. You're not tempted to try to fix the CFI driver for your board anyway, I suppose? :-) Thanks for the pointer. Rogan