From: Michal Simek Date: Thu, 23 Jul 2015 14:40:57 +0200 Subject: [U-Boot] [PATCH v4] armv8: caches: Added routine to set non cacheable region In-Reply-To: <20150707133235.590f9d46@lilith> References: <1435322107-30322-1-git-send-email-sivadur@xilinx.com> <20150707133235.590f9d46@lilith> Message-ID: <55B0E0D9.2030104@monstr.eu> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Albert, On 07/07/2015 01:32 PM, Albert ARIBAUD wrote: > Hello Siva, > > On Tue, 7 Jul 2015 06:04:16 +0000, Siva Durga Prasad Paladugu > wrote: >> Hi Mark, >> >> Do you have any more comments on this. If not, can you take up this patch. > > Actually, I would be the one who would take up this patch. Seeing as > it did not attract new comments so far, I'll pick it up once I'm done > with the current ARM PR -- but don't expect it to appear in 2015.07. Can you please pick this one? When this patch is applied I can enable ethernet controller for zynqmp. Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 198 bytes Desc: OpenPGP digital signature URL: