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[35.233.69.230]) by smtp.gmail.com with ESMTPSA id b131sm105865wmb.34.2021.03.22.10.40.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Mar 2021 10:40:43 -0700 (PDT) Date: Mon, 22 Mar 2021 17:40:40 +0000 From: Quentin Perret To: Marc Zyngier Subject: Re: [PATCH 2/3] KVM: arm64: Generate final CTR_EL0 value when running in Protected mode Message-ID: References: <20210322164828.800662-1-maz@kernel.org> <20210322164828.800662-3-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210322164828.800662-3-maz@kernel.org> Cc: android-kvm@google.com, catalin.marinas@arm.com, mate.toth-pal@arm.com, tabba@google.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, seanjc@google.com, kernel-team@android.com, kvmarm@lists.cs.columbia.edu X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu Hey Marc, On Monday 22 Mar 2021 at 16:48:27 (+0000), Marc Zyngier wrote: > In protected mode, late CPUs are not allowed to boot (enforced by > the PSCI relay). We can thus specialise the read_ctr macro to > always return a pre-computed, sanitised value. > > Signed-off-by: Marc Zyngier > --- > arch/arm64/include/asm/assembler.h | 9 +++++++++ > arch/arm64/kernel/image-vars.h | 1 + > arch/arm64/kvm/va_layout.c | 7 +++++++ > 3 files changed, 17 insertions(+) > > diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h > index fb651c1f26e9..1a4cee7eb3c9 100644 > --- a/arch/arm64/include/asm/assembler.h > +++ b/arch/arm64/include/asm/assembler.h > @@ -270,12 +270,21 @@ alternative_endif > * provide the system wide safe value from arm64_ftr_reg_ctrel0.sys_val > */ > .macro read_ctr, reg > +#ifndef __KVM_NVHE_HYPERVISOR__ > alternative_if_not ARM64_MISMATCHED_CACHE_TYPE > mrs \reg, ctr_el0 // read CTR > nop > alternative_else > ldr_l \reg, arm64_ftr_reg_ctrel0 + ARM64_FTR_SYSVAL > alternative_endif > +#else > +alternative_cb kvm_compute_final_ctr_el0 > + movz \reg, #0 > + movk \reg, #0, lsl #16 > + movk \reg, #0, lsl #32 > + movk \reg, #0, lsl #48 > +alternative_cb_end > +#endif > .endm So, FWIW, if we wanted to make _this_ macro BUG in non-protected mode (and drop patch 01), I think we could do something like: alternative_cb kvm_compute_final_ctr_el0 movz \reg, #0 ASM_BUG() nop nop alternative_cb_end and then make kvm_compute_final_ctr_el0() check that we're in protected mode before patching. That would be marginally better as that would cover _all_ users of read_ctr and not just __flush_dcache_area, but that first movz is a bit yuck (but necessary to keep generate_mov_q() happy I think?), so I'll leave the decision to you. No objection from me for the current implementation, and if you decide to go with it: Reviewed-by: Quentin Perret Thanks, Quentin _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm