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Date: Wed, 11 Nov 2026 19:11:25 +0800
From: Herbert Xu <herbert@gondor.apana.org.au>
To: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Cc: Abel Vesa <abelvesa@kernel.org>,
	"David S. Miller" <davem@davemloft.net>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Subject: Re: [PATCH v2] dt-bindings: crypto: qcom,inline-crypto-engine: Add
 IPQ5210, IPQ5424 and IPQ9650
Message-ID: <avRNXY5Hxbjw5Szi@gondor.apana.org.au>
References: <20261021-ice-v2-1-3dfa8f343ceb@oss.qualcomm.com>
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In-Reply-To: <20261021-ice-v2-1-3dfa8f343ceb@oss.qualcomm.com>

On Wed, Oct 21, 2026 at 11:19:44AM +0530, Varadarajan Narayanan wrote:
> Document the Inline Crypto Engine compatibles for the Qualcomm IPQ5210,
> IPQ5424 and IPQ9650 SoCs.
> 
> Separate the power-domains requirement from the two-clock requirement.
> IPQ5210/IPQ5424/IPQ9650 require two clocks but intentionally do not require
> power-domains because they have no RPM.
> 
> Preserve the existing requirements for other platforms.
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
> ---
> Changes in v2:
> - Fix sort order in the !power-domains block
> - Pick R-b Krzysztof
> - Link to v1: https://lore.kernel.org/r/20261016-ice-v1-1-4098b1972f31@oss.qualcomm.com
> ---
>  .../bindings/crypto/qcom,inline-crypto-engine.yaml | 27 +++++++++++++++++++++-
>  1 file changed, 26 insertions(+), 1 deletion(-)

Patch applied.  Thanks.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt