From: stefan@agner.ch (Stefan Agner) Date: Thu, 25 Oct 2018 19:58:47 +0200 Subject: [PATCH V2 4/8] gpio: vf610: add optional clock support In-Reply-To: <1540295058-26090-5-git-send-email-aisheng.dong@nxp.com> References: <1540295058-26090-1-git-send-email-aisheng.dong@nxp.com> <1540295058-26090-5-git-send-email-aisheng.dong@nxp.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 23.10.2018 13:49, A.s. Dong wrote: > Some SoCs need the gpio clock to be enabled before accessing > HW registers. This patch add the optional clock handling. > > Cc: Linus Walleij > Cc: Stefan Agner > Cc: Shawn Guo > Cc: linux-gpio at vger.kernel.org > Signed-off-by: Dong Aisheng > --- > v1->v2: > * new patch > --- > drivers/gpio/gpio-vf610.c | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c > index d4ad6d0..cbc4f44 100644 > --- a/drivers/gpio/gpio-vf610.c > +++ b/drivers/gpio/gpio-vf610.c > @@ -16,6 +16,7 @@ > */ > > #include > +#include > #include > #include > #include > @@ -256,6 +257,7 @@ static int vf610_gpio_probe(struct platform_device *pdev) > { > struct device *dev = &pdev->dev; > struct device_node *np = dev->of_node; > + struct clk *clk_gpio, *clk_port; > struct vf610_gpio_port *port; > struct resource *iores; > struct gpio_chip *gc; > @@ -280,6 +282,24 @@ static int vf610_gpio_probe(struct platform_device *pdev) > if (port->irq < 0) > return port->irq; > > + clk_gpio = devm_clk_get(&pdev->dev, "gpio"); > + clk_port = devm_clk_get(&pdev->dev, "port"); Are you sure that those are two independent clocks? On i.MX 7 usually there was a single clock gate controlling multiple clocks at once (which should be modeled as a single clock gate in the clock tree). -- Stefan > + if ((PTR_ERR(clk_gpio) == -EPROBE_DEFER) || > + (PTR_ERR(clk_port) == -EPROBE_DEFER)) { > + return -EPROBE_DEFER; > + } else if (!IS_ERR_OR_NULL(clk_gpio) && > + !IS_ERR_OR_NULL(clk_port)) { > + ret = clk_prepare_enable(clk_gpio); > + if (ret) > + return ret; > + > + ret = clk_prepare_enable(clk_port); > + if (ret) { > + clk_disable_unprepare(clk_gpio); > + return ret; > + } > + } > + > gc = &port->gc; > gc->of_node = np; > gc->parent = dev;