Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 29AA033EC for ; Mon, 13 Feb 2023 12:15:28 +0000 (UTC) Received: from loongson.cn (unknown [112.20.108.204]) by gateway (Coremail) with SMTP id _____8CxidneKepjchQAAA--.225S3; Mon, 13 Feb 2023 20:15:26 +0800 (CST) Received: from localhost.localdomain (unknown [112.20.108.204]) by localhost.localdomain (Coremail) with SMTP id AQAAf8CxPuTdKepjPEQyAA--.58840S2; Mon, 13 Feb 2023 20:15:26 +0800 (CST) From: Binbin Zhou To: Huacai Chen , Jiaxun Yang , Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski Cc: Jianmin Lv , Huacai Chen , linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, loongarch@lists.linux.dev, devicetree@vger.kernel.org, loongson-kernel@lists.loongnix.cn, Binbin Zhou Subject: [PATCH V2 0/2] Loongson: irqchip: Add loongson-eiointc DT init support Date: Mon, 13 Feb 2023 20:15:26 +0800 Message-Id: X-Mailer: git-send-email 2.39.0 Precedence: bulk X-Mailing-List: loongarch@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID:AQAAf8CxPuTdKepjPEQyAA--.58840S2 X-CM-SenderInfo: p2kr3uplqex0o6or00hjvr0hdfq/ X-Coremail-Antispam: 1Uk129KBjvdXoW7Jr1Utr43WF48Xw1UCrW5Awb_yoWfArcE9a 4Iv34UJr9FqF17Xa9rJr48try3CrW2q3WjkF4jgF1j93Z5Ar15GF17Aw12ga1xKFW5Xrn8 ZrWrCr1xAFyxCjkaLaAFLSUrUUUU1b8apTn2vfkv8UJUUUU8wcxFpf9Il3svdxBIdaVrn0 xqx4xG64xvF2IEw4CE5I8CrVC2j2Jv73VFW2AGmfu7bjvjm3AaLaJ3UjIYCTnIWjp_UUUY W7kC6x804xWl14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0rVWrJVCq3w AFIxvE14AKwVWUXVWUAwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK021l84ACjcxK 6xIIjxv20xvE14v26r1I6r4UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r1j6r4UM28EF7 xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_Cr1j6rxdM2kK e7AKxVWUXVWUAwAS0I0E0xvYzxvE52x082IY62kv0487Mc804VCY07AIYIkI8VC2zVCFFI 0UMc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2IY67AKxVWUXVWUAwAv7VC2z280 aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0Y48IcxkI7VAKI48JMxkF7I0En4 kS14v26r126r1DMxAIw28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMxCIbckI 1I0E14v26r1Y6r17MI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwVAFwI0_JrI_Jr Wlx4CE17CEb7AF67AKxVWUtVW8ZwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r1j 6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVWUJVW8JwCI42IY6xAIw20EY4v20xvaj40_Jr 0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x0267AKxVWUJVW8JbIY CTnIWIevJa73UjIFyTuYvjxUc9a9UUUUU Hi all: Add EIOINTC irqchip DT support, which is needed for Loongson chips that are DT-based and support EIOINTC, such as the Loongson-2K0500 SOC. We need to handle the "parent_irq" and "eio-num-vecs" parameters passed from DTS. Thanks. --- V2: - Add the dt-bindings file (1/2); - patch(2/2) - Remove forgotten debugging messages; - Rename properties name: "vec_count"->"loongson,eio-num-vecs"; - Change compatible string name to "loongson,eiointc-1.0". Binbin Zhou (2): dt-bindings: interrupt-controller: Add Loongson EIOINTC irqchip/loongson-eiointc: Add DT init support .../loongson,eiointc.yaml | 80 ++++++++++++ drivers/irqchip/irq-loongson-eiointc.c | 119 +++++++++++++----- 2 files changed, 165 insertions(+), 34 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml -- 2.39.0