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From: Alison Schofield <alison.schofield@intel.com>
To: Davidlohr Bueso <dave@stgolabs.net>,
	Jonathan Cameron <jic23@kernel.org>,
	Dave Jiang <dave.jiang@intel.com>,
	Alison Schofield <alison.schofield@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	Ira Weiny <iweiny@kernel.org>,
	Li Ming <ming.li@zohomail.com>,
	Robert Richter <rrichter@amd.com>,
	Richard Cheng <icheng@nvidia.com>,
	Ben Cheatham <benjamin.cheatham@amd.com>
Cc: linux-cxl@vger.kernel.org
Subject: [PATCH v7 0/5] CXL: Support region granularities finer than the root
Date: Fri,  6 Nov 2026 13:57:07 -0800
Message-ID: <cover.1794000806.git.alison.schofield@intel.com>
Precedence: list
MIME-Version: 1.0
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Changes in v7:
- Rebase onto for-7.5/cxl-port-refactor
- Patch 3: adjust unaligned translate to work w new layouts (Sashiko)
- Patch 4: commit log wordsmith only
v6: https://lore.kernel.org/linux-cxl/cover.1791863201.git.alison.schofield@intel.com/


Begin Cover Letter:

Linux requires a region's interleave granularity to equal the interleave
granularity of its interleaving root decoder. This series relaxes that one
restriction: a region granularity may be finer than the root granularity,
provided the interleave levels between them refine monotonically toward
the endpoints.

This series does not add general support for every granularity arrangement
the CXL Specification permits. A region granularity coarser than the root
remains invalid, and configurations whose granularity refines and then
coarsens along the decoder path remain unsupported. Of the Mod3
configurations listed in CXL 4.0 Section 9.13.1.1, all are supported
except Table 9-6 row 6, the refine-then-coarsen 12-way composition.

The use case driving this series is 6- and 12-way regions behind a 3-way
host bridge interleave, CXL 4.0 Tables 9-6 and 9-7, which have no
same-granularity alternative. Power-of-two regions finer than the root
fall out of the same implementation.

Support applies to both firmware programmed auto regions and user created
regions.

Two prior proposals addressed parts of this gap:

AlisonS introduced position arithmetic and sysfs gating for auto and
user-created regions to support the 6- and 12-way interleave configurations
without a same-granularity alternative [1].

RobertR introduced an HPA selector-bit model for auto regions that allows
multi-level power-of-two interleaves regardless of granularity ordering [2].

Series structure in v7:
-----------------------
Patch 1 documents which region granularities Linux supports relative to the
root and the monotonic refinement model.

Patch 2 generalizes endpoint position calculation to account for granularity
changes between decoder levels.

Patch 3 enables auto regions with a granularity finer than the root and
validates their decoder geometry.

Patch 4 enables user created regions with a granularity finer than the root
by relaxing the existing root/region granularity restriction.

Patch 5 adds a cxl_test topology and coverage for region granularity finer
than the root.

The companion NDCTL patchset that allows these regions in 'cxl create-region'
and adds the unit test support is posted [3].

[1] https://lore.kernel.org/all/20250306232239.2609017-1-alison.schofield@intel.com/
[2] https://lore.kernel.org/all/20251028094754.72816-1-rrichter@amd.com/
[3] https://lore.kernel.org/linux-cxl/cover.1791863817.git.alison.schofield@intel.com/


Alison Schofield (5):
  Documentation/cxl: Describe region granularity finer than the root
  cxl/region: Generalize endpoint position mapping
  cxl/region: Support auto region granularity finer than the root
  cxl/region: Support user region granularity finer than the root
  cxl/test: Add a topology for region granularity finer than the root

 .../driver-api/cxl/linux/cxl-driver.rst       | 119 +++++
 drivers/cxl/core/region.c                     | 224 +++++++---
 tools/testing/cxl/test/cxl.c                  | 420 +++++++++++++++++-
 3 files changed, 683 insertions(+), 80 deletions(-)


base-commit: 0e3e8b653ca3ab145aced729861cf0d1a06da69e
-- 
2.37.3