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From: Alison Schofield <alison.schofield@intel.com>
To: Davidlohr Bueso <dave@stgolabs.net>,
	Jonathan Cameron <jic23@kernel.org>,
	Dave Jiang <dave.jiang@intel.com>,
	Alison Schofield <alison.schofield@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	Ira Weiny <iweiny@kernel.org>,
	Li Ming <ming.li@zohomail.com>,
	Richard Cheng <icheng@nvidia.com>,
	Ben Cheatham <benjamin.cheatham@amd.com>
Cc: linux-cxl@vger.kernel.org
Subject: [PATCH 0/3] cxl/region: Carry the effective interleave state through target setup
Date: Fri,  6 Nov 2026 16:34:59 -0800
Message-ID: <cover.1794010889.git.alison.schofield@intel.com>
Precedence: list
MIME-Version: 1.0
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This replaces "cxl: Allow passthrough decoders with >16K granularity"[1]

Review of that series showed the >16K failure was actually a symptom of a
pre-existing problem. The switch decoder setup used the parent decoder
object to carry the interleave state down the hierarchy, and a passthrough
decoder's granularity is a hardware don't-care.

Patch 1 carries the effective interleave ways and granularity in each
port's region reference. The approach was discussed here [2].

Patches 2 and 3 add support for cxl_test coverage.

Based on cxl/for-7.5/cxl-port-refactor

[1] https://lore.kernel.org/linux-cxl/cover.1788487020.git.alison.schofield@intel.com/
[2] https://lore.kernel.org/linux-cxl/aqnWLH-nrXk6BYqM@aschofie-mobl2.lan/


Alison Schofield (3):
  cxl/region: Carry the effective interleave state through target setup
  cxl/test: Add a 2-way 16K root decoder for passthrough testing
  cxl/test: Program a don't-care granularity into the passthrough host
    bridge

 drivers/cxl/core/region.c    | 28 +++++++++++++----
 drivers/cxl/cxl.h            |  5 +++
 tools/testing/cxl/test/cxl.c | 61 +++++++++++++++++++++++++++++++-----
 3 files changed, 81 insertions(+), 13 deletions(-)


base-commit: 0e3e8b653ca3ab145aced729861cf0d1a06da69e
-- 
2.37.3