Return-Path: Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline Content-Transfer-Encoding: 8bit MIME-Version: 1.0 From: Ben Hutchings To: linux-kernel@vger.kernel.org, stable@vger.kernel.org CC: akpm@linux-foundation.org, "Ralf Baechle" , "Markos Chandras" , "Paul Burton" , linux-mips@linux-mips.org, "James Hogan" Date: Sun, 11 Nov 2018 19:49:05 +0000 Message-ID: Subject: [PATCH 3.16 348/366] MIPS: asmmacro: Ensure 64-bit FP registers are used with MSA In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org List-ID: 3.16.61-rc1 review patch. If anyone has any objections, please let me know. ------------------ From: Markos Chandras commit 2bd7bc254ab1f45269db6dd7957d63b713817408 upstream. This silences warnings like the following one when building with the latest binutils: arch/mips/kernel/genex.S: Assembler messages: arch/mips/kernel/genex.S:438: Warning: the `msa' extension requires 64-bit FPRs [ralf@linux-mips.org: Markos says binutils 2.25 and some 2.24 snapshots are affected.] Signed-off-by: Markos Chandras Reviewed-by: James Hogan Cc: Paul Burton Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9745/ Signed-off-by: Ralf Baechle Signed-off-by: Ben Hutchings --- arch/mips/include/asm/asmmacro.h | 11 +++++++++++ 1 file changed, 11 insertions(+) --- a/arch/mips/include/asm/asmmacro.h +++ b/arch/mips/include/asm/asmmacro.h @@ -209,9 +209,13 @@ .endm #ifdef TOOLCHAIN_SUPPORTS_MSA +/* preprocessor replaces the fp in ".set fp=64" with $30 otherwise */ +#undef fp + .macro _cfcmsa rd, cs .set push .set mips32r2 + .set fp=64 .set msa cfcmsa \rd, $\cs .set pop @@ -220,6 +224,7 @@ .macro _ctcmsa cd, rs .set push .set mips32r2 + .set fp=64 .set msa ctcmsa $\cd, \rs .set pop @@ -228,6 +233,7 @@ .macro ld_d wd, off, base .set push .set mips32r2 + .set fp=64 .set msa ld.d $w\wd, \off(\base) .set pop @@ -236,6 +242,7 @@ .macro st_d wd, off, base .set push .set mips32r2 + .set fp=64 .set msa st.d $w\wd, \off(\base) .set pop @@ -244,6 +251,7 @@ .macro copy_u_w ws, n .set push .set mips32r2 + .set fp=64 .set msa copy_u.w $1, $w\ws[\n] .set pop @@ -252,6 +260,7 @@ .macro copy_u_d ws, n .set push .set mips64r2 + .set fp=64 .set msa copy_u.d $1, $w\ws[\n] .set pop @@ -260,6 +269,7 @@ .macro insert_w wd, n .set push .set mips32r2 + .set fp=64 .set msa insert.w $w\wd[\n], $1 .set pop @@ -268,6 +278,7 @@ .macro insert_d wd, n .set push .set mips64r2 + .set fp=64 .set msa insert.d $w\wd[\n], $1 .set pop