ARM: S5P: Add high resolution timer support

This patch adds support HR-Timer(High Resolution Timer) and dynamic tick system for S5P SoCs. There are many clock sources for HR-Timer on S5P SoCs. The PWM timer, RTC, System Timer, and MCT can be used for clock source.
This patch can only support PWM timer for clocksource of S5P64x0 and S5PV210.

Signed-off-by Sangbeom Kim <[email protected]>

---

?arch/arm/plat-s5p/Makefile ? ? ? ? ? ? ? ?| ? ?1 +
?arch/arm/plat-s5p/include/plat/s5p-time.h | ? 37 +++
?arch/arm/plat-s5p/s5p-time.c ? ? ? ? ? ? ?| ?395 +++++++++++++++++++++++++++++

?3 files changed, 433 insertions(+), 0 deletions(-) ?create mode 100644 arch/arm/plat-s5p/include/plat/s5p-time.h ?create mode 100644 arch/arm/plat-s5p/s5p-time.c

arch/arm/plat-s5p/Makefile +0 -0

index 4bd5cf9..3b8cc2f 100644
@@ -22,6 +22,7 @@ obj-$(CONFIG_S5P_GPIO_INT) ? ?+= irq-gpioint.o

?obj-$(CONFIG_S5P_SYSTEM_MMU) ? += sysmmu.o
?obj-$(CONFIG_PM) ? ? ? ? ? ? ? += pm.o
?obj-$(CONFIG_PM) ? ? ? ? ? ? ? += irq-pm.o
+obj-$(CONFIG_GENERIC_CLOCKEVENTS) += s5p-time.o

?# devices

arch/arm/plat-s5p/include/plat/s5p-time.h new file +37 -0

new file mode 100644
index 0000000..e478f0c
@@ -0,0 +1,37 @@
+/* linux/arch/arm/plat-s5p/include/plat/s5p-time.h
+ *
+ * Copyright 2011 Samsung Electronics Co., Ltd.
+ * ? ? ? ? ? ? http://www.samsung.com/
+ *
+ * Header file for s5p time support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_PLAT_S5P_TIME_H
+#define __ASM_PLAT_S5P_TIME_H __FILE__
+
+/* S5P HR-Timer Clock mode */
+enum s5p_timer_mode {
+ ? ? ? S5P_PWM0,
+ ? ? ? S5P_PWM1,
+ ? ? ? S5P_PWM2,
+ ? ? ? S5P_PWM3,
+ ? ? ? S5P_PWM4,
+};
+
+struct s5p_timer_source {
+ ? ? ? unsigned int event_id;
+ ? ? ? unsigned int source_id;
+};
+
+#define TCNT_MAX ? ? ? ? ? ? ? 0xffffffff
+#define NON_PERIODIC ? ? ? ? ? 0
+#define PERIODIC ? ? ? ? ? ? ? 1
+
+extern void __init s5p_set_timer_source(enum s5p_timer_mode event,
+ ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? enum s5p_timer_mode source);
+extern struct sys_timer s5p_timer;
+#endif /* __ASM_PLAT_S5P_TIME_H */

arch/arm/plat-s5p/s5p-time.c new file +227 -0

new file mode 100644
index 0000000..4691728
@@ -0,0 +1,395 @@
+/* linux/arch/arm/plat-s5p/s5p-time.c
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ * ? ? ? ? ? ? http://www.samsung.com/
+ *
+ * S5P - Common hr-timer support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/clockchips.h>
+#include <linux/platform_device.h>
+
+#include <asm/smp_twd.h>
+#include <asm/mach/time.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <mach/map.h>
+#include <plat/regs-timer.h>
+#include <plat/s5p-time.h>
+
+static struct clk *tin_event;
+static struct clk *tin_source;
+static struct clk *tdiv_event;
+static struct clk *tdiv_source;
+static struct clk *timerclk;
+static struct s5p_timer_source timer_source;
+static unsigned long clock_count_per_tick;
+static void s5p_timer_resume(void);
+
+static void s5p_time_stop(enum s5p_timer_mode mode)
+{
+ ? ? ? unsigned long tcon;
+
+ ? ? ? tcon = __raw_readl(S3C2410_TCON);
+
+ ? ? ? switch (mode) {
+ ? ? ? case S5P_PWM0:
+ ? ? ? ? ? ? ? tcon &= ~S3C2410_TCON_T0START;
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? case S5P_PWM1:
+ ? ? ? ? ? ? ? tcon &= ~S3C2410_TCON_T1START;
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? case S5P_PWM2:
+ ? ? ? ? ? ? ? tcon &= ~S3C2410_TCON_T2START;
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? case S5P_PWM3:
+ ? ? ? ? ? ? ? tcon &= ~S3C2410_TCON_T3START;
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? case S5P_PWM4:
+ ? ? ? ? ? ? ? tcon &= ~S3C2410_TCON_T4START;
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? default:
+ ? ? ? ? ? ? ? printk(KERN_ERR "Invalid Timer %d\n", mode);
+ ? ? ? ? ? ? ? break;
+ ? ? ? }
+ ? ? ? __raw_writel(tcon, S3C2410_TCON);
+}
+
+static void s5p_time_setup(enum s5p_timer_mode mode, unsigned long tcnt)
+{
+ ? ? ? unsigned long tcon;
+
+ ? ? ? tcon = __raw_readl(S3C2410_TCON);
+
+ ? ? ? tcnt--;
+
+ ? ? ? switch (mode) {
+ ? ? ? case S5P_PWM0:
+ ? ? ? ? ? ? ? tcon &= ~(0x0f << 0);
+ ? ? ? ? ? ? ? tcon |= S3C2410_TCON_T0MANUALUPD;
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? case S5P_PWM1:
+ ? ? ? ? ? ? ? tcon &= ~(0x0f << 8);
+ ? ? ? ? ? ? ? tcon |= S3C2410_TCON_T1MANUALUPD;
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? case S5P_PWM2:
+ ? ? ? ? ? ? ? tcon &= ~(0x0f << 0x0c);
+ ? ? ? ? ? ? ? tcon |= S3C2410_TCON_T2MANUALUPD;
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? case S5P_PWM3:
+ ? ? ? ? ? ? ? tcon &= ~(0xf << 0x10);
+ ? ? ? ? ? ? ? tcon |= S3C2410_TCON_T3MANUALUPD;
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? case S5P_PWM4:
+ ? ? ? ? ? ? ? tcon &= ~(7 << 0x14);
+ ? ? ? ? ? ? ? tcon |= S3C2410_TCON_T4MANUALUPD;
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? default:
+ ? ? ? ? ? ? ? printk(KERN_ERR "Invalid Timer %d\n", mode);
+ ? ? ? ? ? ? ? break;
+ ? ? ? }
+
+ ? ? ? __raw_writel(tcnt, S3C2410_TCNTB(mode));
+ ? ? ? __raw_writel(tcnt, S3C2410_TCMPB(mode));
+ ? ? ? __raw_writel(tcon, S3C2410_TCON);
+}
+
+static void s5p_time_start(enum s5p_timer_mode mode, bool periodic)
+{
+ ? ? ? unsigned long tcon;
+
+ ? ? ? tcon ?= __raw_readl(S3C2410_TCON);
+
+ ? ? ? switch (mode) {
+ ? ? ? case S5P_PWM0:
+ ? ? ? ? ? ? ? tcon |= S3C2410_TCON_T0START;
+ ? ? ? ? ? ? ? tcon &= ~S3C2410_TCON_T0MANUALUPD;
+
+ ? ? ? ? ? ? ? if (periodic)
+ ? ? ? ? ? ? ? ? ? ? ? tcon |= S3C2410_TCON_T0RELOAD;
+ ? ? ? ? ? ? ? else
+ ? ? ? ? ? ? ? ? ? ? ? tcon &= ~S3C2410_TCON_T0RELOAD;
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? case S5P_PWM1:
+ ? ? ? ? ? ? ? tcon |= S3C2410_TCON_T1START;
+ ? ? ? ? ? ? ? tcon &= ~S3C2410_TCON_T1MANUALUPD;
+
+ ? ? ? ? ? ? ? if (periodic)
+ ? ? ? ? ? ? ? ? ? ? ? tcon |= S3C2410_TCON_T1RELOAD;
+ ? ? ? ? ? ? ? else
+ ? ? ? ? ? ? ? ? ? ? ? tcon &= ~S3C2410_TCON_T1RELOAD;
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? case S5P_PWM2:
+ ? ? ? ? ? ? ? tcon |= S3C2410_TCON_T2START;
+ ? ? ? ? ? ? ? tcon &= ~S3C2410_TCON_T2MANUALUPD;
+
+ ? ? ? ? ? ? ? if (periodic)
+ ? ? ? ? ? ? ? ? ? ? ? tcon |= S3C2410_TCON_T2RELOAD;
+ ? ? ? ? ? ? ? else
+ ? ? ? ? ? ? ? ? ? ? ? tcon &= ~S3C2410_TCON_T2RELOAD;
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? case S5P_PWM3:
+ ? ? ? ? ? ? ? tcon |= S3C2410_TCON_T3START;
+ ? ? ? ? ? ? ? tcon &= ~S3C2410_TCON_T3MANUALUPD;
+
+ ? ? ? ? ? ? ? if (periodic)
+ ? ? ? ? ? ? ? ? ? ? ? tcon |= S3C2410_TCON_T3RELOAD;
+ ? ? ? ? ? ? ? else
+ ? ? ? ? ? ? ? ? ? ? ? tcon &= ~S3C2410_TCON_T3RELOAD;
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? case S5P_PWM4:
+ ? ? ? ? ? ? ? tcon |= S3C2410_TCON_T4START;
+ ? ? ? ? ? ? ? tcon &= ~S3C2410_TCON_T4MANUALUPD;
+
+ ? ? ? ? ? ? ? if (periodic)
+ ? ? ? ? ? ? ? ? ? ? ? tcon |= S3C2410_TCON_T4RELOAD;
+ ? ? ? ? ? ? ? else
+ ? ? ? ? ? ? ? ? ? ? ? tcon &= ~S3C2410_TCON_T4RELOAD;
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? default:
+ ? ? ? ? ? ? ? printk(KERN_ERR "Invalid Timer %d\n", mode);
+ ? ? ? ? ? ? ? break;
+ ? ? ? }
+ ? ? ? __raw_writel(tcon, S3C2410_TCON);
+}
+
+static int s5p_set_next_event(unsigned long cycles,
+ ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? struct clock_event_device *evt)
+{
+ ? ? ? s5p_time_setup(timer_source.event_id, cycles);
+ ? ? ? s5p_time_start(timer_source.event_id, NON_PERIODIC);
+
+ ? ? ? return 0;
+}
+
+static void s5p_set_mode(enum clock_event_mode mode,
+ ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? struct clock_event_device *evt)
+{
+
+ ? ? ? s5p_time_stop(timer_source.event_id);
+
+ ? ? ? switch (mode) {
+ ? ? ? case CLOCK_EVT_MODE_PERIODIC:
+ ? ? ? ? ? ? ? s5p_time_setup(timer_source.event_id, clock_count_per_tick);
+ ? ? ? ? ? ? ? s5p_time_start(timer_source.event_id, PERIODIC);
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? case CLOCK_EVT_MODE_ONESHOT:
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? case CLOCK_EVT_MODE_UNUSED:
+ ? ? ? case CLOCK_EVT_MODE_SHUTDOWN:
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? case CLOCK_EVT_MODE_RESUME:
+ ? ? ? ? ? ? ? s5p_timer_resume();
+ ? ? ? ? ? ? ? break;
+ ? ? ? }
+}
+
+static void s5p_timer_resume(void)
+{
+ ? ? ? /* event timer restart */
+ ? ? ? s5p_time_setup(timer_source.event_id, clock_count_per_tick);
+ ? ? ? s5p_time_start(timer_source.event_id, PERIODIC);
+
+ ? ? ? /* source timer restart */
+ ? ? ? s5p_time_setup(timer_source.source_id, TCNT_MAX);
+ ? ? ? s5p_time_start(timer_source.source_id, PERIODIC);
+}
+
+void __init s5p_set_timer_source(enum s5p_timer_mode event,
+ ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?enum s5p_timer_mode source)

arch/arm/plat-s5p/s5p-time.c new file +10 -0

+ ? ? ? .set_next_event = s5p_set_next_event,
+ ? ? ? .set_mode ? ? ? = s5p_set_mode,
+};
+
+static irqreturn_t s5p_clock_event_isr(int irq, void *dev_id)
+{
+ ? ? ? struct clock_event_device *evt = &time_event_device;
+
+ ? ? ? evt->event_handler(evt);
+

arch/arm/plat-s5p/s5p-time.c new file +53 -0

+{
+ ? ? ? unsigned long pclk;
+ ? ? ? unsigned long clock_rate;
+ ? ? ? unsigned int irq_number;
+ ? ? ? struct clk *tscaler;
+
+ ? ? ? pclk = clk_get_rate(timerclk);
+
+ ? ? ? tscaler = clk_get_parent(tdiv_event);
+
+ ? ? ? clk_set_rate(tscaler, pclk / 2);
+ ? ? ? clk_set_rate(tdiv_event, pclk / 2);
+ ? ? ? clk_set_parent(tin_event, tdiv_event);
+
+ ? ? ? clock_rate = clk_get_rate(tin_event);
+ ? ? ? clock_count_per_tick = clock_rate / HZ;
+
+ ? ? ? time_event_device.mult =
+ ? ? ? ? ? ? ? div_sc(clock_rate, NSEC_PER_SEC, time_event_device.shift);
+ ? ? ? time_event_device.max_delta_ns =
+ ? ? ? ? ? ? ? clockevent_delta2ns(-1, &time_event_device);
+ ? ? ? time_event_device.min_delta_ns =
+ ? ? ? ? ? ? ? clockevent_delta2ns(1, &time_event_device);
+
+ ? ? ? time_event_device.cpumask = cpumask_of(0);
+ ? ? ? clockevents_register_device(&time_event_device);
+
+ ? ? ? irq_number = timer_source.event_id + IRQ_TIMER0;
+
+ ? ? ? setup_irq(irq_number, &s5p_clock_event_irq);
+}
+
+static cycle_t s5p_timer_read(struct clocksource *cs)
+{
+ ? ? ? unsigned long offset = 0;
+
+ ? ? ? switch (timer_source.source_id) {
+ ? ? ? case S5P_PWM0:
+ ? ? ? case S5P_PWM1:
+ ? ? ? case S5P_PWM2:
+ ? ? ? case S5P_PWM3:
+ ? ? ? ? ? ? ? offset = (timer_source.source_id * 0x0c) + 0x14;
+ ? ? ? case S5P_PWM4:
+ ? ? ? ? ? ? ? offset = 0x40;
+ ? ? ? ? ? ? ? break;
+
+ ? ? ? default:
+ ? ? ? ? ? ? ? printk(KERN_ERR "Invalid Timer %d\n", timer_source.source_id);
+ ? ? ? ? ? ? ? return 0;
+ ? ? ? }
+
+ ? ? ? return (cycle_t) ~__raw_readl(S3C_TIMERREG(offset));
+}

arch/arm/plat-s5p/s5p-time.c new file +75 -1

+{
+ ? ? ? unsigned long pclk;
+ ? ? ? unsigned long clock_rate;
+
+ ? ? ? pclk = clk_get_rate(timerclk);
+
+ ? ? ? clk_set_rate(tdiv_source, pclk / 2);
+ ? ? ? clk_set_parent(tin_source, tdiv_source);
+
+ ? ? ? clock_rate = clk_get_rate(tin_source);
+
+ ? ? ? s5p_time_setup(timer_source.source_id, TCNT_MAX);
+ ? ? ? s5p_time_start(timer_source.source_id, PERIODIC);
+
+ ? ? ? if (clocksource_register_hz(&time_clocksource, clock_rate))
+ ? ? ? ? ? ? ? panic("%s: can't register clocksource\n", time_clocksource.name);
+}
+
+static void __init s5p_timer_resources(void)
+{
+ ? ? ? struct platform_device tmpdev;
+
+ ? ? ? tmpdev.dev.bus = &platform_bus_type;
+
+ ? ? ? timerclk = clk_get(NULL, "timers");
+ ? ? ? if (IS_ERR(timerclk))
+ ? ? ? ? ? ? ? panic("failed to get timers clock for system timer");
+
+ ? ? ? clk_enable(timerclk);
+
+ ? ? ? tmpdev.id = timer_source.event_id;
+ ? ? ? tin_event = clk_get(&tmpdev.dev, "pwm-tin");
+ ? ? ? if (IS_ERR(tin_event)) {
+ ? ? ? ? ? ? ? clk_put(tin_event);
+ ? ? ? ? ? ? ? panic("failed to get pwm-tin2 clock for system timer");
+ ? ? ? }
+
+ ? ? ? tdiv_event = clk_get(&tmpdev.dev, "pwm-tdiv");
+ ? ? ? if (IS_ERR(tdiv_event)) {
+ ? ? ? ? ? ? ? clk_put(tdiv_event);
+ ? ? ? ? ? ? ? panic("failed to get pwm-tdiv2 clock for system timer");
+ ? ? ? }
+
+ ? ? ? clk_enable(tin_event);
+
+ ? ? ? tmpdev.id = timer_source.source_id;
+ ? ? ? tin_source = clk_get(&tmpdev.dev, "pwm-tin");
+ ? ? ? if (IS_ERR(tin_source)) {
+ ? ? ? ? ? ? ? clk_put(tin_source);
+ ? ? ? ? ? ? ? panic("failed to get pwm-tin4 clock for system timer");
+ ? ? ? }
+
+ ? ? ? tdiv_source = clk_get(&tmpdev.dev, "pwm-tdiv");
+ ? ? ? if (IS_ERR(tdiv_source)) {
+ ? ? ? ? ? ? ? clk_put(tdiv_source);
+ ? ? ? ? ? ? ? panic("failed to get pwm-tdiv4 clock for system timer");
+ ? ? ? }
+
+ ? ? ? clk_enable(tin_source);
+}
+
+static void __init s5p_timer_init(void)
+{
+#ifdef CONFIG_LOCAL_TIMERS
+ ? ? ? twd_base = S5P_VA_TWD;
+#endif
+
+ ? ? ? s5p_timer_resources();
+ ? ? ? s5p_clockevent_init();
+ ? ? ? s5p_clocksource_init();
+}
+
+struct sys_timer s5p_timer = {
+ ? ? ? .init ? ? ? ? ? = s5p_timer_init,
+};
--

1.7.1

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(...)

(quoted diff) +14 -0

+static void s5p_clockevent_init(void)
+{
+ ? ? ? unsigned long pclk;
+ ? ? ? unsigned long clock_rate;
+ ? ? ? unsigned int irq_number;
+ ? ? ? struct clk *tscaler;
+
+ ? ? ? pclk = clk_get_rate(timerclk);
+
+ ? ? ? tscaler = clk_get_parent(tdiv_event);
+
+ ? ? ? clk_set_rate(tscaler, pclk / 2);
+ ? ? ? clk_set_rate(tdiv_event, pclk / 2);
+ ? ? ? clk_set_parent(tin_event, tdiv_event);

(...)

(quoted diff) +8 -0

+static void s5p_clocksource_init(void)
+{
+ ? ? ? unsigned long pclk;
+ ? ? ? unsigned long clock_rate;
+
+ ? ? ? pclk = clk_get_rate(timerclk);
+
+ ? ? ? clk_set_rate(tdiv_source, pclk / 2);

-----Original Message-----
From: linux-samsung-soc-owner at vger.kernel.org [mailto:linux-samsung-soc- owner at vger.kernel.org] On Behalf Of Linus Walleij
Sent: Saturday, February 26, 2011 6:34 PM
To: Sangbeom Kim
Cc: linux-arm-kernel at lists.infradead.org; linux-samsung-
soc at vger.kernel.org; kgene.kim at samsung.com; ben-linux at fluff.org
Subject: Re: [PATCH 1/3] ARM: S5P: Add s5p_timer support for HRT

2011/2/26 Sangbeom Kim <[email protected]>:

Quoted 13 lines

(...)

(quoted diff) +12 -0

+static void s5p_clockevent_init(void)
+{
+ ? ? ? unsigned long pclk;
+ ? ? ? unsigned long clock_rate;
+ ? ? ? unsigned int irq_number;
+ ? ? ? struct clk *tscaler;
+
+ ? ? ? pclk = clk_get_rate(timerclk);
+
+ ? ? ? tscaler = clk_get_parent(tdiv_event);
+
+ ? ? ? clk_set_rate(tscaler, pclk / 2);

Review

Quoted 8 lines

+ ? ? ? clk_set_rate(tdiv_event, pclk / 2);
+ ? ? ? clk_set_parent(tin_event, tdiv_event);

(quoted diff) +6 -0

+
+ ? ? ? clock_rate = clk_get_rate(tin_event);
+ ? ? ? clock_count_per_tick = clock_rate / HZ;
+
+ ? ? ? time_event_device.mult =
+ ? ? ? ? ? ? ? div_sc(clock_rate, NSEC_PER_SEC,

Quoted 4 lines

+ ? ? ? time_event_device.max_delta_ns =
+ ? ? ? ? ? ? ? clockevent_delta2ns(-1, &time_event_device);
+ ? ? ? time_event_device.min_delta_ns =
+ ? ? ? ? ? ? ? clockevent_delta2ns(1, &time_event_device);

This is a very complicated and inprecise way of doing this nowadays. Skip hardcoding the shift value and calculating mult like that and use

/* Be able to sleep for atleast 4 seconds (usually more) */ #define EVT_MIN_RANGE 4

clockevents_calc_mult_shift(&time_event_device,

                                    clock_rate, EVT_MIN_RANGE);

Quoted 8 lines

(...)

(quoted diff) +7 -0

+static void s5p_clocksource_init(void)
+{
+ ? ? ? unsigned long pclk;
+ ? ? ? unsigned long clock_rate;
+
+ ? ? ? pclk = clk_get_rate(timerclk);
+

Review

Quoted 10 lines

(quoted diff) +10 -0

+ ? ? ? clk_set_rate(tdiv_source, pclk / 2);
+ ? ? ? clk_set_parent(tin_source, tdiv_source);
+
+ ? ? ? clock_rate = clk_get_rate(tin_source);
+
+ ? ? ? s5p_time_setup(timer_source.source_id, TCNT_MAX);
+ ? ? ? s5p_time_start(timer_source.source_id, PERIODIC);
+
+ ? ? ? if (clocksource_register_hz(&time_clocksource, clock_rate))
+ ? ? ? ? ? ? ? panic("%s: can't register clocksource\n",

time_clocksource.name);

Quoted 1 line

+}

This is more like it :-)

But you probably also want to add a sched_clock hook for this platform too, so you get some nice scheduling resolution.

I suggest you look at the simple straight-forward driver for U300 in arch/arm/mach-u300/timer.c for inspiration. It's using the same timer that is used for clocksource for sched_clock().

Yours,
Linus Walleij
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+};

arch/arm/plat-s5p/s5p-time.c line 244

Quoted 3 lines · Sangbeom Kim

arch/arm/plat-s5p/s5p-time.c new file +3 -0

+static irqreturn_t s5p_clock_event_isr(int irq, void *dev_id)
+{
+	struct clock_event_device *evt = &time_event_device;

	struct clock_event_device *evt = dev_id;

arch/arm/plat-s5p/s5p-time.c line 254

Quoted 10 lines

arch/arm/plat-s5p/s5p-time.c new file +10 -0

+
+	evt->event_handler(evt);
+
+	return IRQ_HANDLED;
+}
+
+static struct irqaction s5p_clock_event_irq = {
+	.name		= "s5p_time_irq",
+	.flags		= IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
+	.handler	= s5p_clock_event_isr,

	.dev_id	 	= &time_event_device,

Quoted 1 line

+};

...

arch/arm/plat-s5p/s5p-time.c line 351

Quoted 13 lines

arch/arm/plat-s5p/s5p-time.c new file +13 -0

+static void __init s5p_timer_resources(void)
+{
+	struct platform_device tmpdev;
+
+	tmpdev.dev.bus = &platform_bus_type;
+
+	timerclk = clk_get(NULL, "timers");
+	if (IS_ERR(timerclk))
+		panic("failed to get timers clock for system timer");
+
+	clk_enable(timerclk);
+
+	tmpdev.id = timer_source.event_id;

So Samsung clock stuff is still being idiotic. Will this ever be fixed?

arch/arm/plat-s5p/s5p-time.c line 354

Quoted 3 lines

arch/arm/plat-s5p/s5p-time.c new file +3 -0

+	tin_event = clk_get(&tmpdev.dev, "pwm-tin");
+	if (IS_ERR(tin_event)) {
+		clk_put(tin_event);

Don't clk_put errors.

arch/arm/plat-s5p/s5p-time.c line 360

Quoted 6 lines

arch/arm/plat-s5p/s5p-time.c new file +6 -0

+		panic("failed to get pwm-tin2 clock for system timer");
+	}
+
+	tdiv_event = clk_get(&tmpdev.dev, "pwm-tdiv");
+	if (IS_ERR(tdiv_event)) {
+		clk_put(tdiv_event);

Ditto.

arch/arm/plat-s5p/s5p-time.c line 369

Quoted 9 lines

arch/arm/plat-s5p/s5p-time.c new file +9 -0

+		panic("failed to get pwm-tdiv2 clock for system timer");
+	}
+
+	clk_enable(tin_event);
+
+	tmpdev.id = timer_source.source_id;
+	tin_source = clk_get(&tmpdev.dev, "pwm-tin");
+	if (IS_ERR(tin_source)) {
+		clk_put(tin_source);

Ditto.

arch/arm/plat-s5p/s5p-time.c line 375

Quoted 6 lines

arch/arm/plat-s5p/s5p-time.c new file +6 -0

+		panic("failed to get pwm-tin4 clock for system timer");
+	}
+
+	tdiv_source = clk_get(&tmpdev.dev, "pwm-tdiv");
+	if (IS_ERR(tdiv_source)) {
+		clk_put(tdiv_source);

Ditto.

This patch update mach-s5p64x0 and mach-s5pv210
machine ?initialization for hrt support

Signed-off-by Sangbeom Kim <[email protected]>

---

?arch/arm/mach-s5p64x0/mach-smdk6440.c | ? ?4 +++-
?arch/arm/mach-s5p64x0/mach-smdk6450.c | ? ?4 +++-
?arch/arm/mach-s5pv210/mach-aquila.c ? | ? ?4 +++-
?arch/arm/mach-s5pv210/mach-goni.c ? ? | ? ?4 +++-
?arch/arm/mach-s5pv210/mach-smdkc110.c | ? ?4 +++-
?arch/arm/mach-s5pv210/mach-smdkv210.c | ? ?4 +++-
?arch/arm/mach-s5pv210/mach-torbreck.c | ? ?4 +++-

?7 files changed, 21 insertions(+), 7 deletions(-)

arch/arm/mach-s5p64x0/mach-smdk6440.c +0 -0

index e5beb84..f967736 100644
@@ -43,6 +43,7 @@

?#include <plat/pll.h>
?#include <plat/adc.h>
?#include <plat/ts.h>
+#include <plat/s5p-time.h>

?#define SMDK6440_UCON_DEFAULT ?(S3C2410_UCON_TXILEVEL | ? ? ? ?\
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?S3C2410_UCON_RXILEVEL | ? ? ? ? \

arch/arm/mach-s5p64x0/mach-smdk6440.c +2 -1

@@ -136,6 +137,7 @@ static void __init smdk6440_map_io(void)
 ? ? ? ?s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
 ? ? ? ?s3c24xx_init_clocks(12000000);
 ? ? ? ?s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs));
+ ? ? ? s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
 ?}
 
 ?static void __init smdk6440_machine_init(void)

@@ -159,5 +161,5 @@ MACHINE_START(SMDK6440, "SMDK6440")
 ? ? ? ?.init_irq ? ? ? = s5p6440_init_irq,
 ? ? ? ?.map_io ? ? ? ? = smdk6440_map_io,
 ? ? ? ?.init_machine ? = smdk6440_machine_init,
- ? ? ? .timer ? ? ? ? ?= &s3c24xx_timer,
+ ? ? ? .timer ? ? ? ? ?= &s5p_timer,

?MACHINE_END

arch/arm/mach-s5p64x0/mach-smdk6450.c +0 -0

index 3a20de0..686ec56 100644
@@ -43,6 +43,7 @@

?#include <plat/pll.h>
?#include <plat/adc.h>
?#include <plat/ts.h>
+#include <plat/s5p-time.h>

?#define SMDK6450_UCON_DEFAULT ?(S3C2410_UCON_TXILEVEL | ? ? ? ?\
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?S3C2410_UCON_RXILEVEL | ? ? ? ? \

arch/arm/mach-s5p64x0/mach-smdk6450.c +2 -1

@@ -155,6 +156,7 @@ static void __init smdk6450_map_io(void)
 ? ? ? ?s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
 ? ? ? ?s3c24xx_init_clocks(19200000);
 ? ? ? ?s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs));
+ ? ? ? s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
 ?}
 
 ?static void __init smdk6450_machine_init(void)

@@ -178,5 +180,5 @@ MACHINE_START(SMDK6450, "SMDK6450")
 ? ? ? ?.init_irq ? ? ? = s5p6450_init_irq,
 ? ? ? ?.map_io ? ? ? ? = smdk6450_map_io,
 ? ? ? ?.init_machine ? = smdk6450_machine_init,
- ? ? ? .timer ? ? ? ? ?= &s3c24xx_timer,
+ ? ? ? .timer ? ? ? ? ?= &s5p_timer,

?MACHINE_END

arch/arm/mach-s5pv210/mach-aquila.c +0 -0

index 557add4..fab84f3 100644
@@ -39,6 +39,7 @@

?#include <plat/fb.h>
?#include <plat/fimc-core.h>
?#include <plat/sdhci.h>
+#include <plat/s5p-time.h>

?/* Following are default values for UCON, ULCON and UFCON UART registers */ ?#define AQUILA_UCON_DEFAULT ? ?(S3C2410_UCON_TXILEVEL | ? ? ? ?\

arch/arm/mach-s5pv210/mach-aquila.c +2 -1

@@ -664,6 +665,7 @@ static void __init aquila_map_io(void)
 ? ? ? ?s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 ? ? ? ?s3c24xx_init_clocks(24000000);
 ? ? ? ?s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs));
+ ? ? ? s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
 ?}
 
 ?static void __init aquila_machine_init(void)

@@ -698,5 +700,5 @@ MACHINE_START(AQUILA, "Aquila")
 ? ? ? ?.init_irq ? ? ? = s5pv210_init_irq,
 ? ? ? ?.map_io ? ? ? ? = aquila_map_io,
 ? ? ? ?.init_machine ? = aquila_machine_init,
- ? ? ? .timer ? ? ? ? ?= &s3c24xx_timer,
+ ? ? ? .timer ? ? ? ? ?= &s5p_timer,

?MACHINE_END

arch/arm/mach-s5pv210/mach-goni.c +0 -0

index 056f5c7..5eda4a1 100644
@@ -45,6 +45,7 @@

?#include <plat/keypad.h>
?#include <plat/sdhci.h>
?#include <plat/clock.h>
+#include <plat/s5p-time.h>

?/* Following are default values for UCON, ULCON and UFCON UART registers */ ?#define GONI_UCON_DEFAULT ? ? ?(S3C2410_UCON_TXILEVEL | ? ? ? ?\

arch/arm/mach-s5pv210/mach-goni.c +2 -1

@@ -823,6 +824,7 @@ static void __init goni_map_io(void)
 ? ? ? ?s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 ? ? ? ?s3c24xx_init_clocks(24000000);
 ? ? ? ?s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs));
+ ? ? ? s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
 ?}
 
 ?static void __init goni_machine_init(void)

@@ -873,5 +875,5 @@ MACHINE_START(GONI, "GONI")
 ? ? ? ?.init_irq ? ? ? = s5pv210_init_irq,
 ? ? ? ?.map_io ? ? ? ? = goni_map_io,
 ? ? ? ?.init_machine ? = goni_machine_init,
- ? ? ? .timer ? ? ? ? ?= &s3c24xx_timer,
+ ? ? ? .timer ? ? ? ? ?= &s5p_timer,

?MACHINE_END

arch/arm/mach-s5pv210/mach-smdkc110.c +0 -0

index ce11a02..f304383 100644
@@ -30,6 +30,7 @@

?#include <plat/ata.h>
?#include <plat/iic.h>
?#include <plat/pm.h>
+#include <plat/s5p-time.h>

?/* Following are default values for UCON, ULCON and UFCON UART registers */ ?#define SMDKC110_UCON_DEFAULT ?(S3C2410_UCON_TXILEVEL | ? ? ? ?\

arch/arm/mach-s5pv210/mach-smdkc110.c +2 -1

@@ -111,6 +112,7 @@ static void __init smdkc110_map_io(void)
 ? ? ? ?s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 ? ? ? ?s3c24xx_init_clocks(24000000);
 ? ? ? ?s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
+ ? ? ? s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
 ?}
 
 ?static void __init smdkc110_machine_init(void)

@@ -138,5 +140,5 @@ MACHINE_START(SMDKC110, "SMDKC110")
 ? ? ? ?.init_irq ? ? ? = s5pv210_init_irq,
 ? ? ? ?.map_io ? ? ? ? = smdkc110_map_io,
 ? ? ? ?.init_machine ? = smdkc110_machine_init,
- ? ? ? .timer ? ? ? ? ?= &s3c24xx_timer,
+ ? ? ? .timer ? ? ? ? ?= &s5p_timer,

?MACHINE_END

arch/arm/mach-s5pv210/mach-smdkv210.c +0 -0

index bc9fdb5..41080bf 100644
@@ -43,6 +43,7 @@

?#include <plat/keypad.h>
?#include <plat/pm.h>
?#include <plat/fb.h>
+#include <plat/s5p-time.h>

?/* Following are default values for UCON, ULCON and UFCON UART registers */ ?#define SMDKV210_UCON_DEFAULT ?(S3C2410_UCON_TXILEVEL | ? ? ? ?\

arch/arm/mach-s5pv210/mach-smdkv210.c +2 -1

@@ -272,6 +273,7 @@ static void __init smdkv210_map_io(void)
 ? ? ? ?s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 ? ? ? ?s3c24xx_init_clocks(24000000);
 ? ? ? ?s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
+ ? ? ? s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
 ?}
 
 ?static void __init smdkv210_machine_init(void)

@@ -306,5 +308,5 @@ MACHINE_START(SMDKV210, "SMDKV210")
 ? ? ? ?.init_irq ? ? ? = s5pv210_init_irq,
 ? ? ? ?.map_io ? ? ? ? = smdkv210_map_io,
 ? ? ? ?.init_machine ? = smdkv210_machine_init,
- ? ? ? .timer ? ? ? ? ?= &s3c24xx_timer,
+ ? ? ? .timer ? ? ? ? ?= &s5p_timer,

?MACHINE_END

arch/arm/mach-s5pv210/mach-torbreck.c +0 -0

index 043c938..b3516a1 100644
@@ -27,6 +27,7 @@

?#include <plat/devs.h>
?#include <plat/cpu.h>
?#include <plat/iic.h>
+#include <plat/s5p-time.h>

?/* Following are default values for UCON, ULCON and UFCON UART registers */ ?#define TORBRECK_UCON_DEFAULT ?(S3C2410_UCON_TXILEVEL | ? ? ? ?\

arch/arm/mach-s5pv210/mach-torbreck.c +2 -1

@@ -104,6 +105,7 @@ static void __init torbreck_map_io(void)
 ? ? ? ?s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 ? ? ? ?s3c24xx_init_clocks(24000000);
 ? ? ? ?s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs));
+ ? ? ? s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
 ?}
 
 ?static void __init torbreck_machine_init(void)

@@ -127,5 +129,5 @@ MACHINE_START(TORBRECK, "TORBRECK")
 ? ? ? ?.init_irq ? ? ? = s5pv210_init_irq,
 ? ? ? ?.map_io ? ? ? ? = torbreck_map_io,
 ? ? ? ?.init_machine ? = torbreck_machine_init,
- ? ? ? .timer ? ? ? ? ?= &s3c24xx_timer,
+ ? ? ? .timer ? ? ? ? ?= &s5p_timer,

?MACHINE_END
--
1.7.1

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To: Sangbeom Kim
Cc: linux-arm-kernel at lists.infradead.org; linux-samsung- soc at vger.kernel.org; kgene.kim at samsung.com; ben-linux at fluff.org
Subject: Re: [PATCH 2/3] ARM: S5P: Update machine initialization for HRT

Acked-by Kyungmin Park <[email protected]>

It's just curious. Are there any reason to use PWM2 & 4. Theoretically it's possible to use PWM2 for other purpose as it's connected with external devices such as haptic or PWM backlight.

But in case of PWM3 doesn't, it's only used for internal purpose. no external output pin.

I just wonder it.
If you know the history reason, please let me know.

Thank you,
Kyungmin Park

On Sat, Feb 26, 2011 at 11:45 AM, Sangbeom Kim <[email protected]>

arch/arm/mach-

Quoted 15 lines

This patch update mach-s5p64x0 and mach-s5pv210
machine ?initialization for hrt support

Signed-off-by Sangbeom Kim <[email protected]>

---

?arch/arm/mach-s5p64x0/mach-smdk6440.c | ? ?4 +++-
?arch/arm/mach-s5p64x0/mach-smdk6450.c | ? ?4 +++-
?arch/arm/mach-s5pv210/mach-aquila.c ? | ? ?4 +++-
?arch/arm/mach-s5pv210/mach-goni.c ? ? | ? ?4 +++-
?arch/arm/mach-s5pv210/mach-smdkc110.c | ? ?4 +++-
?arch/arm/mach-s5pv210/mach-smdkv210.c | ? ?4 +++-
?arch/arm/mach-s5pv210/mach-torbreck.c | ? ?4 +++-

?7 files changed, 21 insertions(+), 7 deletions(-)

arch/arm/mach- renamed from arch/arm/mach-s5p64x0/mach-smdk6440.c +0 -0

s5p64x0/mach-smdk6440.c

Quoted 12 lines

index e5beb84..f967736 100644

arch/arm/mach-s5p64x0/mach-smdk6440.c +0 -0

@@ -43,6 +43,7 @@

?#include <plat/pll.h>
?#include <plat/adc.h>
?#include <plat/ts.h>
+#include <plat/s5p-time.h>

?#define SMDK6440_UCON_DEFAULT ?(S3C2410_UCON_TXILEVEL | ? ? ? ?\
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?S3C2410_UCON_RXILEVEL | ? ? ? ? \

arch/arm/mach-s5p64x0/mach-smdk6440.c static void __init smdk6440_map_io(void) · line 139

Quoted 3 lines

arch/arm/mach-s5p64x0/mach-smdk6440.c +0 -0

@@ -136,6 +137,7 @@ static void __init smdk6440_map_io(void)
 ? ? ? ?s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
 ? ? ? ?s3c24xx_init_clocks(12000000);
 ? ? ? ?s3c24xx_init_uarts(smdk6440_uartcfgs,

ARRAY_SIZE(smdk6440_uartcfgs));

arch/arm/mach-

Quoted 12 lines

arch/arm/mach-s5p64x0/mach-smdk6440.c +2 -1

+ ? ? ? s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
 ?}
 
 ?static void __init smdk6440_machine_init(void)

@@ -159,5 +161,5 @@ MACHINE_START(SMDK6440, "SMDK6440")
 ? ? ? ?.init_irq ? ? ? = s5p6440_init_irq,
 ? ? ? ?.map_io ? ? ? ? = smdk6440_map_io,
 ? ? ? ?.init_machine ? = smdk6440_machine_init,
- ? ? ? .timer ? ? ? ? ?= &s3c24xx_timer,
+ ? ? ? .timer ? ? ? ? ?= &s5p_timer,

?MACHINE_END

arch/arm/mach- renamed from arch/arm/mach-s5p64x0/mach-smdk6450.c +0 -0

s5p64x0/mach-smdk6450.c

Quoted 12 lines

index 3a20de0..686ec56 100644

arch/arm/mach-s5p64x0/mach-smdk6450.c +0 -0

@@ -43,6 +43,7 @@

?#include <plat/pll.h>
?#include <plat/adc.h>
?#include <plat/ts.h>
+#include <plat/s5p-time.h>

?#define SMDK6450_UCON_DEFAULT ?(S3C2410_UCON_TXILEVEL | ? ? ? ?\
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?S3C2410_UCON_RXILEVEL | ? ? ? ? \

arch/arm/mach-s5p64x0/mach-smdk6450.c static void __init smdk6450_map_io(void) · line 158

Quoted 3 lines

arch/arm/mach-s5p64x0/mach-smdk6450.c +0 -0

@@ -155,6 +156,7 @@ static void __init smdk6450_map_io(void)
 ? ? ? ?s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
 ? ? ? ?s3c24xx_init_clocks(19200000);
 ? ? ? ?s3c24xx_init_uarts(smdk6450_uartcfgs,

ARRAY_SIZE(smdk6450_uartcfgs));

arch/arm/mach-

Quoted 12 lines

arch/arm/mach-s5p64x0/mach-smdk6450.c +2 -1

+ ? ? ? s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
 ?}
 
 ?static void __init smdk6450_machine_init(void)

@@ -178,5 +180,5 @@ MACHINE_START(SMDK6450, "SMDK6450")
 ? ? ? ?.init_irq ? ? ? = s5p6450_init_irq,
 ? ? ? ?.map_io ? ? ? ? = smdk6450_map_io,
 ? ? ? ?.init_machine ? = smdk6450_machine_init,
- ? ? ? .timer ? ? ? ? ?= &s3c24xx_timer,
+ ? ? ? .timer ? ? ? ? ?= &s5p_timer,

?MACHINE_END

arch/arm/mach- renamed from arch/arm/mach-s5pv210/mach-aquila.c +0 -0

s5pv210/mach-aquila.c

Quoted 10 lines

index 557add4..fab84f3 100644

arch/arm/mach-s5pv210/mach-aquila.c +0 -0

@@ -39,6 +39,7 @@

?#include <plat/fb.h>
?#include <plat/fimc-core.h>
?#include <plat/sdhci.h>
+#include <plat/s5p-time.h>

?/* Following are default values for UCON, ULCON and UFCON UART

registers */

arch/arm/mach-

Quoted 17 lines

?#define AQUILA_UCON_DEFAULT ? ?(S3C2410_UCON_TXILEVEL | ? ? ? ?\

arch/arm/mach-s5pv210/mach-aquila.c +2 -1

@@ -664,6 +665,7 @@ static void __init aquila_map_io(void)
 ? ? ? ?s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 ? ? ? ?s3c24xx_init_clocks(24000000);
 ? ? ? ?s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs));
+ ? ? ? s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
 ?}
 
 ?static void __init aquila_machine_init(void)

@@ -698,5 +700,5 @@ MACHINE_START(AQUILA, "Aquila")
 ? ? ? ?.init_irq ? ? ? = s5pv210_init_irq,
 ? ? ? ?.map_io ? ? ? ? = aquila_map_io,
 ? ? ? ?.init_machine ? = aquila_machine_init,
- ? ? ? .timer ? ? ? ? ?= &s3c24xx_timer,
+ ? ? ? .timer ? ? ? ? ?= &s5p_timer,

?MACHINE_END

arch/arm/mach- renamed from arch/arm/mach-s5pv210/mach-goni.c +0 -0

s5pv210/mach-goni.c

Quoted 10 lines

index 056f5c7..5eda4a1 100644

arch/arm/mach-s5pv210/mach-goni.c +0 -0

@@ -45,6 +45,7 @@

?#include <plat/keypad.h>
?#include <plat/sdhci.h>
?#include <plat/clock.h>
+#include <plat/s5p-time.h>

?/* Following are default values for UCON, ULCON and UFCON UART

registers */

arch/arm/mach-

Quoted 17 lines

?#define GONI_UCON_DEFAULT ? ? ?(S3C2410_UCON_TXILEVEL | ? ? ? ?\

arch/arm/mach-s5pv210/mach-goni.c +2 -1

@@ -823,6 +824,7 @@ static void __init goni_map_io(void)
 ? ? ? ?s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 ? ? ? ?s3c24xx_init_clocks(24000000);
 ? ? ? ?s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs));
+ ? ? ? s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
 ?}
 
 ?static void __init goni_machine_init(void)

@@ -873,5 +875,5 @@ MACHINE_START(GONI, "GONI")
 ? ? ? ?.init_irq ? ? ? = s5pv210_init_irq,
 ? ? ? ?.map_io ? ? ? ? = goni_map_io,
 ? ? ? ?.init_machine ? = goni_machine_init,
- ? ? ? .timer ? ? ? ? ?= &s3c24xx_timer,
+ ? ? ? .timer ? ? ? ? ?= &s5p_timer,

?MACHINE_END

arch/arm/mach- renamed from arch/arm/mach-s5pv210/mach-smdkc110.c +0 -0

s5pv210/mach-smdkc110.c

Quoted 10 lines

index ce11a02..f304383 100644

arch/arm/mach-s5pv210/mach-smdkc110.c +0 -0

@@ -30,6 +30,7 @@

?#include <plat/ata.h>
?#include <plat/iic.h>
?#include <plat/pm.h>
+#include <plat/s5p-time.h>

?/* Following are default values for UCON, ULCON and UFCON UART

registers */

arch/arm/mach-s5pv210/mach-smdkc110.c static void __init smdkc110_map_io(void) · line 114

Quoted 5 lines

?#define SMDKC110_UCON_DEFAULT ?(S3C2410_UCON_TXILEVEL | ? ? ? ?\

arch/arm/mach-s5pv210/mach-smdkc110.c +0 -0

@@ -111,6 +112,7 @@ static void __init smdkc110_map_io(void)
 ? ? ? ?s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 ? ? ? ?s3c24xx_init_clocks(24000000);
 ? ? ? ?s3c24xx_init_uarts(smdkv210_uartcfgs,

ARRAY_SIZE(smdkv210_uartcfgs));

arch/arm/mach-

Quoted 12 lines

arch/arm/mach-s5pv210/mach-smdkc110.c +2 -1

+ ? ? ? s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
 ?}
 
 ?static void __init smdkc110_machine_init(void)

@@ -138,5 +140,5 @@ MACHINE_START(SMDKC110, "SMDKC110")
 ? ? ? ?.init_irq ? ? ? = s5pv210_init_irq,
 ? ? ? ?.map_io ? ? ? ? = smdkc110_map_io,
 ? ? ? ?.init_machine ? = smdkc110_machine_init,
- ? ? ? .timer ? ? ? ? ?= &s3c24xx_timer,
+ ? ? ? .timer ? ? ? ? ?= &s5p_timer,

?MACHINE_END

arch/arm/mach- renamed from arch/arm/mach-s5pv210/mach-smdkv210.c +0 -0

s5pv210/mach-smdkv210.c

Quoted 10 lines

index bc9fdb5..41080bf 100644

arch/arm/mach-s5pv210/mach-smdkv210.c +0 -0

@@ -43,6 +43,7 @@

?#include <plat/keypad.h>
?#include <plat/pm.h>
?#include <plat/fb.h>
+#include <plat/s5p-time.h>

?/* Following are default values for UCON, ULCON and UFCON UART

registers */

arch/arm/mach-s5pv210/mach-smdkv210.c static void __init smdkv210_map_io(void) · line 275

Quoted 5 lines

?#define SMDKV210_UCON_DEFAULT ?(S3C2410_UCON_TXILEVEL | ? ? ? ?\

arch/arm/mach-s5pv210/mach-smdkv210.c +0 -0

@@ -272,6 +273,7 @@ static void __init smdkv210_map_io(void)
 ? ? ? ?s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 ? ? ? ?s3c24xx_init_clocks(24000000);
 ? ? ? ?s3c24xx_init_uarts(smdkv210_uartcfgs,

ARRAY_SIZE(smdkv210_uartcfgs));

arch/arm/mach-

Quoted 12 lines

arch/arm/mach-s5pv210/mach-smdkv210.c +2 -1

+ ? ? ? s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
 ?}
 
 ?static void __init smdkv210_machine_init(void)

@@ -306,5 +308,5 @@ MACHINE_START(SMDKV210, "SMDKV210")
 ? ? ? ?.init_irq ? ? ? = s5pv210_init_irq,
 ? ? ? ?.map_io ? ? ? ? = smdkv210_map_io,
 ? ? ? ?.init_machine ? = smdkv210_machine_init,
- ? ? ? .timer ? ? ? ? ?= &s3c24xx_timer,
+ ? ? ? .timer ? ? ? ? ?= &s5p_timer,

?MACHINE_END

arch/arm/mach- renamed from arch/arm/mach-s5pv210/mach-torbreck.c +0 -0

s5pv210/mach-torbreck.c

Quoted 10 lines

index 043c938..b3516a1 100644

arch/arm/mach-s5pv210/mach-torbreck.c +0 -0

@@ -27,6 +27,7 @@

?#include <plat/devs.h>
?#include <plat/cpu.h>
?#include <plat/iic.h>
+#include <plat/s5p-time.h>

?/* Following are default values for UCON, ULCON and UFCON UART

registers */

arch/arm/mach-s5pv210/mach-torbreck.c static void __init torbreck_map_io(void) · line 107

Quoted 5 lines

?#define TORBRECK_UCON_DEFAULT ?(S3C2410_UCON_TXILEVEL | ? ? ? ?\

arch/arm/mach-s5pv210/mach-torbreck.c +0 -0

@@ -104,6 +105,7 @@ static void __init torbreck_map_io(void)
 ? ? ? ?s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 ? ? ? ?s3c24xx_init_clocks(24000000);
 ? ? ? ?s3c24xx_init_uarts(torbreck_uartcfgs,

ARRAY_SIZE(torbreck_uartcfgs));

Quoted 14 lines

arch/arm/mach-s5pv210/mach-torbreck.c +2 -1

+ ? ? ? s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
 ?}
 
 ?static void __init torbreck_machine_init(void)

@@ -127,5 +129,5 @@ MACHINE_START(TORBRECK, "TORBRECK")
 ? ? ? ?.init_irq ? ? ? = s5pv210_init_irq,
 ? ? ? ?.map_io ? ? ? ? = torbreck_map_io,
 ? ? ? ?.init_machine ? = torbreck_machine_init,
- ? ? ? .timer ? ? ? ? ?= &s3c24xx_timer,
+ ? ? ? .timer ? ? ? ? ?= &s5p_timer,

?MACHINE_END
--
1.7.1

Quoted 2 lines

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