pci: exynos: split into two parts such as Synopsys part and Exynos part
Subsystems (4)
PATCH v4 1/1 pci: exynos: split into two parts such as Synopsys part and Exynos part
Exynos PCIe IP consists of Synopsys specific part and Exynos specific part. Only core block is a Synopsys designware part; other parts are Exynos specific.
Also, the Synopsys designware part can be shared with other platforms; thus, it can be split two parts such as Synopsys designware part and Exynos specific part.
Signed-off-by Jingoo Han <[email protected]>
Cc Pratyush Anand <[email protected]>
Cc Mohit KUMAR <[email protected]>
---
Changes since v3:
- moved exynos specific code to exynos_pcie_probe()
- moved synopsys common code to dw_pcie_host_init()
- made pp->dbi_base mapping selectively
- unchecked resource with devm_ioremap_resource()
.../devicetree/bindings/pci/designware-pcie.txt | 3 + arch/arm/boot/dts/exynos5440.dtsi | 2 + drivers/pci/host/Makefile | 3 +- drivers/pci/host/pci-exynos.c | 530 ++++++++++ drivers/pci/host/pcie-designware.c | 1011 ++++++-------------- drivers/pci/host/pcie-designware.h | 63 ++ 6 files changed, 872 insertions(+), 740 deletions(-) create mode 100644 drivers/pci/host/pci-exynos.c create mode 100644 drivers/pci/host/pcie-designware.h
Documentation/devicetree/bindings/pci/designware-pcie.txt +3 -0
@@ -18,6 +18,7 @@ Required properties: - interrupt-map-mask and interrupt-map: standard PCI properties to define the mapping of the PCIe interface to interrupt numbers. +- num-lanes: number of lanes to use - reset-gpio: gpio pin number of power good signal Example:
@@ -41,6 +42,7 @@ SoC specific DT Entry: #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0x0 0 &gic 53>; + num-lanes = <4>; }; pcie@2a0000 {
@@ -60,6 +62,7 @@ SoC specific DT Entry: #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0x0 0 &gic 56>; + num-lanes = <4>; }; Board specific DT Entry:
arch/arm/boot/dts/exynos5440.dtsi +2 -0
@@ -275,6 +275,7 @@ #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0x0 0 &gic 53>; + num-lanes = <4>; }; pcie@2a0000 {
@@ -294,5 +295,6 @@ #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0x0 0 &gic 56>; + num-lanes = <4>; }; };
drivers/pci/host/Makefile +2 -1
@@ -1,2 +1,3 @@ -obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o obj-$(CONFIG_PCIE_DW) += pcie-designware.o +obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o +obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o
drivers/pci/host/pci-exynos.c new file +530 -0
530 lines not on this page · raw message
drivers/pci/host/pcie-designware.c +272 -739
1,253 lines not on this page · raw message
drivers/pci/host/pcie-designware.h new file +63 -0
63 lines not on this page · raw message
Signature · 1 line
1.7.10.4