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ARM: imx6: remove config space from PCIe controller ranges property

PATCH New Lucas Stach 5 participants 13 messages Nov 30, 2015 – Apr 26, 2017

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#0 lore raw

PATCH 1/2 ARM: imx6: remove config space from PCIe controller ranges property

This has been moved to the reg property where it belongs for quite some time. The range has been unused by the kernel since then and with kernel 4.4 it's flagged as an unparsable range, as it does not comply to the PCI ranges DT binding. Fix this by removing the superfluous range.

---
 arch/arm/boot/dts/imx6qdl.dtsi | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)
arch/arm/boot/dts/imx6qdl.dtsi +1 -2
index 2b6cc8bf3c5c..a5a731519d9e 100644
@@ -173,8 +173,7 @@
 			#address-cells = <3>;
 			#size-cells = <2>;
 			device_type = "pci";
-			ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000 /* configuration space */
-				  0x81000000 0 0          0x01f80000 0 0x00010000 /* downstream I/O */
+			ranges = <0x81000000 0 0          0x01f80000 0 0x00010000 /* downstream I/O */
 				  0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
 			num-lanes = <1>;
 			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
Signature · 1 line
2.6.2
#1 lore raw

PATCH 2/2 ARM: imx_v6_v7_defconfig: enable PCI_MSI

This has been stable on i.MX6 for a good while now and there is no reason to keep it disabled, as it allows to allocate non-shared IRQs if several PCIe devices are connected to a single host.

---
 arch/arm/configs/imx_v6_v7_defconfig | 1 +
 1 file changed, 1 insertion(+)
arch/arm/configs/imx_v6_v7_defconfig +1 -0
index 4187f69f6630..e2ce60d00e8a 100644
@@ -45,6 +45,7 @@ CONFIG_SOC_IMX7D=y
 CONFIG_SOC_LS1021A=y
 CONFIG_SOC_VF610=y
 CONFIG_PCI=y
+CONFIG_PCI_MSI=y
 CONFIG_PCI_IMX6=y
 CONFIG_SMP=y
 CONFIG_PREEMPT_VOLUNTARY=y
Signature · 1 line
2.6.2
Applied
#2 lore raw

PATCH 2/2 ARM: imx_v6_v7_defconfig: enable PCI_MSI

Quoted 5 lines · Lucas Stach

This has been stable on i.MX6 for a good while now and there is no reason to keep it disabled, as it allows to allocate non-shared IRQs if several PCIe devices are connected to a single host.

Applied, thanks.

#3 lore raw

PATCH 2/2 ARM: imx_v6_v7_defconfig: enable PCI_MSI

In reply to Lucas Stach
Quoted 25 lines · Lucas Stach

This has been stable on i.MX6 for a good while now and there is no reason to keep it disabled, as it allows to allocate non-shared IRQs if several PCIe devices are connected to a single host.

---
 arch/arm/configs/imx_v6_v7_defconfig | 1 +
 1 file changed, 1 insertion(+)
arch/arm/configs/imx_v6_v7_defconfig +1 -1
index 4187f69f6630..e2ce60d00e8a 100644
@@ -45,6 +45,7 @@ CONFIG_SOC_IMX7D=y
 CONFIG_SOC_LS1021A=y
 CONFIG_SOC_VF610=y
 CONFIG_PCI=y
+CONFIG_PCI_MSI=y
 CONFIG_PCI_IMX6=y
 CONFIG_SMP=y
 CONFIG_PREEMPT_VOLUNTARY=y
--

2.6.2

Quoted 4 lines

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Lucas,

Any thoughts on why enabling MSI on IMX6 breaks legacy interrupts?

Again, many PCI devices/drivers don't support MSI and thus enabling MSI as this patch does makes this config break many PCI devices on IMX6.

I have found that MSI does indeed work on the IMX6 for cards/drivers that use MSI, but for those that don't the legacy interrupts never fire regardless of going through a bridge or directly hanging off the IMX6. I assume you can confirm this on your boards/devices as well?

Regards,

Tim

#4 lore raw

PATCH 2/2 ARM: imx_v6_v7_defconfig: enable PCI_MSI

Am Donnerstag, den 14.04.2016, 08:13 -0700 schrieb Tim Harvey:

Quoted 35 lines · Lucas Stach
Quoted 25 lines

This has been stable on i.MX6 for a good while now and there is no reason to keep it disabled, as it allows to allocate non-shared IRQs if several PCIe devices are connected to a single host.

---
 arch/arm/configs/imx_v6_v7_defconfig | 1 +
 1 file changed, 1 insertion(+)
arch/arm/configs/imx_v6_v7_defconfig +1 -1
index 4187f69f6630..e2ce60d00e8a 100644
@@ -45,6 +45,7 @@ CONFIG_SOC_IMX7D=y
 CONFIG_SOC_LS1021A=y
 CONFIG_SOC_VF610=y
 CONFIG_PCI=y
+CONFIG_PCI_MSI=y
 CONFIG_PCI_IMX6=y
 CONFIG_SMP=y
 CONFIG_PREEMPT_VOLUNTARY=y
--

2.6.2

Quoted 4 lines

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Lucas,

Any thoughts on why enabling MSI on IMX6 breaks legacy interrupts?

Quoted 9 lines

Again, many PCI devices/drivers don't support MSI and thus enabling MSI as this patch does makes this config break many PCI devices on IMX6.

I have found that MSI does indeed work on the IMX6 for cards/drivers that use MSI, but for those that don't the legacy interrupts never fire regardless of going through a bridge or directly hanging off the IMX6. I assume you can confirm this on your boards/devices as well?

No, this seems to be an errata in the DW PCIe core. The manual states that legacy IRQs and MSIs can't be used together, but I thought this only applies to the EP part of the core.

We can probably fix the simple configuration by not enabling MSI support until someone actually requests to set up an MSI IRQ, so both IRQ types work when only one EP is connected.
I don't have any idea yet how to fix setups with a PCIe switch where some connected EPs might like to use MSIs while some others can't use them.

Regards,
Lucas

#5 lore raw

PATCH 2/2 ARM: imx_v6_v7_defconfig: enable PCI_MSI

Quoted 56 lines · Lucas Stach

Am Donnerstag, den 14.04.2016, 08:13 -0700 schrieb Tim Harvey:

Quoted 35 lines · Lucas Stach
Quoted 25 lines

This has been stable on i.MX6 for a good while now and there is no reason to keep it disabled, as it allows to allocate non-shared IRQs if several PCIe devices are connected to a single host.

---
 arch/arm/configs/imx_v6_v7_defconfig | 1 +
 1 file changed, 1 insertion(+)
arch/arm/configs/imx_v6_v7_defconfig +1 -1
index 4187f69f6630..e2ce60d00e8a 100644
@@ -45,6 +45,7 @@ CONFIG_SOC_IMX7D=y
 CONFIG_SOC_LS1021A=y
 CONFIG_SOC_VF610=y
 CONFIG_PCI=y
+CONFIG_PCI_MSI=y
 CONFIG_PCI_IMX6=y
 CONFIG_SMP=y
 CONFIG_PREEMPT_VOLUNTARY=y
--

2.6.2

Quoted 4 lines

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Lucas,

Any thoughts on why enabling MSI on IMX6 breaks legacy interrupts?

Quoted 9 lines

Again, many PCI devices/drivers don't support MSI and thus enabling MSI as this patch does makes this config break many PCI devices on IMX6.

I have found that MSI does indeed work on the IMX6 for cards/drivers that use MSI, but for those that don't the legacy interrupts never fire regardless of going through a bridge or directly hanging off the IMX6. I assume you can confirm this on your boards/devices as well?

No, this seems to be an errata in the DW PCIe core. The manual states that legacy IRQs and MSIs can't be used together, but I thought this only applies to the EP part of the core.

We can probably fix the simple configuration by not enabling MSI support until someone actually requests to set up an MSI IRQ, so both IRQ types work when only one EP is connected.
I don't have any idea yet how to fix setups with a PCIe switch where some connected EPs might like to use MSIs while some others can't use them.

Quoted 3 lines

Regards,
Lucas

Lucas,

I feel a bit dumb here for forgetting about this issue and letting it drop, but I've just spent a day debugging an issue with the ath9k wireless driver only to realize it was that the ath9k card and/or driver doesn't support MSI interrupts and thus no longer work on mainline kernels that have MSI enabled. To be honest I'm not sure how many PCIe devices out there can't support MSI because of hardware limitations vs drivers that simply have not implemented it.

To make matters worse 3ee803641e76bea76ec730c80dcc64739a9919ff makes it such that you can't disable MSI on the IMX6.

Is there some fix you can think of to make the IMX6 PCIe host controller raise an interrupt for cards/drivers that use legacy irq's? If not, then we need to allow MSI to be disabled for IMX6 and default it to disabled for compatibility.

Regards,

Tim

#6 lore raw

PATCH 2/2 ARM: imx_v6_v7_defconfig: enable PCI_MSI

Quoted 71 lines · Tim Harvey
Quoted 56 lines · Lucas Stach

Am Donnerstag, den 14.04.2016, 08:13 -0700 schrieb Tim Harvey:

Quoted 35 lines · Lucas Stach
Quoted 25 lines

This has been stable on i.MX6 for a good while now and there is no reason to keep it disabled, as it allows to allocate non-shared IRQs if several PCIe devices are connected to a single host.

---
 arch/arm/configs/imx_v6_v7_defconfig | 1 +
 1 file changed, 1 insertion(+)
arch/arm/configs/imx_v6_v7_defconfig +1 -1
index 4187f69f6630..e2ce60d00e8a 100644
@@ -45,6 +45,7 @@ CONFIG_SOC_IMX7D=y
 CONFIG_SOC_LS1021A=y
 CONFIG_SOC_VF610=y
 CONFIG_PCI=y
+CONFIG_PCI_MSI=y
 CONFIG_PCI_IMX6=y
 CONFIG_SMP=y
 CONFIG_PREEMPT_VOLUNTARY=y
--

2.6.2

Quoted 4 lines

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Lucas,

Any thoughts on why enabling MSI on IMX6 breaks legacy interrupts?

Quoted 9 lines

Again, many PCI devices/drivers don't support MSI and thus enabling MSI as this patch does makes this config break many PCI devices on IMX6.

I have found that MSI does indeed work on the IMX6 for cards/drivers that use MSI, but for those that don't the legacy interrupts never fire regardless of going through a bridge or directly hanging off the IMX6. I assume you can confirm this on your boards/devices as well?

No, this seems to be an errata in the DW PCIe core. The manual states that legacy IRQs and MSIs can't be used together, but I thought this only applies to the EP part of the core.

We can probably fix the simple configuration by not enabling MSI support until someone actually requests to set up an MSI IRQ, so both IRQ types work when only one EP is connected.
I don't have any idea yet how to fix setups with a PCIe switch where some connected EPs might like to use MSIs while some others can't use them.

Quoted 3 lines

Regards,
Lucas

Lucas,

I feel a bit dumb here for forgetting about this issue and letting it drop, but I've just spent a day debugging an issue with the ath9k wireless driver only to realize it was that the ath9k card and/or driver doesn't support MSI interrupts and thus no longer work on mainline kernels that have MSI enabled. To be honest I'm not sure how many PCIe devices out there can't support MSI because of hardware limitations vs drivers that simply have not implemented it.

Quoted 8 lines

To make matters worse 3ee803641e76bea76ec730c80dcc64739a9919ff makes it such that you can't disable MSI on the IMX6.

Is there some fix you can think of to make the IMX6 PCIe host controller raise an interrupt for cards/drivers that use legacy irq's? If not, then we need to allow MSI to be disabled for IMX6 and default it to disabled for compatibility.

Joao / Jingoo,

(Adding linux-pci to the list to pick up maintainers of other DWC PCIe core drivers)

Is Luca's statement that 'legacy IRQs and MSIs can't be used together' true in general for the DW PCIe core? If any of the host controllers using this core can't support both legacy and MSI irqs together I still believe we shouldn't enable/require MSI as it breaks any card/driver that only supports legacy interrupts (such as ath9k).

Regards,

Tim

#7 lore raw

PATCH 2/2 ARM: imx_v6_v7_defconfig: enable PCI_MSI

Quoted 87 lines · Tim Harvey
Quoted 1 line · Tim Harvey

On Fri, Apr 15, 2016 at 1:21 AM, Lucas Stach <[email protected]>

Quoted 2 lines · wrote:
Quoted 2 lines

Am Donnerstag, den 14.04.2016, 08:13 -0700 schrieb Tim Harvey:

Quoted 1 line

On Mon, Nov 30, 2015 at 9:00 AM, Lucas Stach <[email protected]>

Quoted 10 lines · wrote:
Quoted 10 lines
Quoted 10 lines

Review

Quoted 10 lines

This has been stable on i.MX6 for a good while now and there is no reason to keep it disabled, as it allows to allocate non-shared IRQs if several PCIe devices are connected to a single host.

---
 arch/arm/configs/imx_v6_v7_defconfig | 1 +
 1 file changed, 1 insertion(+)
(quoted diff) +0 -0

b/arch/arm/configs/imx_v6_v7_defconfig

Quoted 33 lines
Quoted 33 lines
Quoted 33 lines
Quoted 15 lines

index 4187f69f6630..e2ce60d00e8a 100644

arch/arm/configs/imx_v6_v7_defconfig +1 -1
@@ -45,6 +45,7 @@ CONFIG_SOC_IMX7D=y
 CONFIG_SOC_LS1021A=y
 CONFIG_SOC_VF610=y
 CONFIG_PCI=y
+CONFIG_PCI_MSI=y
 CONFIG_PCI_IMX6=y
 CONFIG_SMP=y
 CONFIG_PREEMPT_VOLUNTARY=y
--

2.6.2

Quoted 4 lines

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Lucas,

Any thoughts on why enabling MSI on IMX6 breaks legacy interrupts?

Again, many PCI devices/drivers don't support MSI and thus enabling MSI as this patch does makes this config break many PCI devices on IMX6.

I have found that MSI does indeed work on the IMX6 for cards/drivers that use MSI, but for those that don't the legacy interrupts never fire regardless of going through a bridge or directly hanging off the IMX6. I assume you can confirm this on your boards/devices as well?

Quoted 5 lines
Quoted 5 lines

No, this seems to be an errata in the DW PCIe core. The manual states that legacy IRQs and MSIs can't be used together, but I thought this only applies to the EP part of the core.

We can probably fix the simple configuration by not enabling MSI

support

Quoted 20 lines
Quoted 9 lines

until someone actually requests to set up an MSI IRQ, so both IRQ types work when only one EP is connected.
I don't have any idea yet how to fix setups with a PCIe switch where some connected EPs might like to use MSIs while some others can't use them.

Regards,
Lucas

Lucas,

I feel a bit dumb here for forgetting about this issue and letting it drop, but I've just spent a day debugging an issue with the ath9k wireless driver only to realize it was that the ath9k card and/or driver doesn't support MSI interrupts and thus no longer work on mainline kernels that have MSI enabled. To be honest I'm not sure how many PCIe devices out there can't support MSI because of hardware limitations vs drivers that simply have not implemented it.

Quoted 8 lines

To make matters worse 3ee803641e76bea76ec730c80dcc64739a9919ff makes it such that you can't disable MSI on the IMX6.

Is there some fix you can think of to make the IMX6 PCIe host controller raise an interrupt for cards/drivers that use legacy irq's? If not, then we need to allow MSI to be disabled for IMX6 and default it to disabled for compatibility.

Joao / Jingoo,

Quoted 8 lines

(Adding linux-pci to the list to pick up maintainers of other DWC PCIe core drivers)

Is Luca's statement that 'legacy IRQs and MSIs can't be used together' true in general for the DW PCIe core? If any of the host controllers using this core can't support both legacy and MSI irqs together I still believe we shouldn't enable/require MSI as it breaks any card/driver that only supports legacy interrupts (such as ath9k).

If there are 2 DW PCIe controllers, one controller can be used for legacy and another controller can be used for MSI.

But, I am not sure that one DW PCIe controller can support both MSI device and legacy interrupt device at the same time.

To Joao Pinto,
Will you confirm this?

Or if there is anyone who knows this well, please share your knowledge. :-) Thanks.

Best regards,
Jingoo Han

Quoted 4 lines

Regards,

Tim

#8 lore raw

PATCH 2/2 ARM: imx_v6_v7_defconfig: enable PCI_MSI

?s 9:54 PM de 4/4/2017, Jingoo Han escreveu:

Quoted 97 lines · Tim Harvey
Quoted 87 lines · Tim Harvey
Quoted 1 line

On Fri, Apr 15, 2016 at 1:21 AM, Lucas Stach <[email protected]>

Quoted 2 lines · wrote:
Quoted 2 lines

Am Donnerstag, den 14.04.2016, 08:13 -0700 schrieb Tim Harvey:

Quoted 1 line

On Mon, Nov 30, 2015 at 9:00 AM, Lucas Stach <[email protected]>

Quoted 10 lines · wrote:
Quoted 10 lines
Quoted 10 lines

Review

Quoted 10 lines

This has been stable on i.MX6 for a good while now and there is no reason to keep it disabled, as it allows to allocate non-shared IRQs if several PCIe devices are connected to a single host.

---
 arch/arm/configs/imx_v6_v7_defconfig | 1 +
 1 file changed, 1 insertion(+)
(quoted diff) +0 -0

b/arch/arm/configs/imx_v6_v7_defconfig

Quoted 33 lines
Quoted 33 lines
Quoted 33 lines
Quoted 15 lines

index 4187f69f6630..e2ce60d00e8a 100644

arch/arm/configs/imx_v6_v7_defconfig +1 -1
@@ -45,6 +45,7 @@ CONFIG_SOC_IMX7D=y
 CONFIG_SOC_LS1021A=y
 CONFIG_SOC_VF610=y
 CONFIG_PCI=y
+CONFIG_PCI_MSI=y
 CONFIG_PCI_IMX6=y
 CONFIG_SMP=y
 CONFIG_PREEMPT_VOLUNTARY=y
--

2.6.2

Quoted 4 lines

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
https://urldefense.proofpoint.com/v2/url?u=http-3A__lists.infradead.org_mailman_listinfo_linux-2Darm-2Dkernel&d=DwICaQ&c=DPL6_X_6JkXFx7AXWqB0tg&r=s2fO0hii0OGNOv9qQy_HRXy-xAJUD1NNoEcc3io_kx0&m=yQx7ybu-JGcPPh6ZlQyxkC6_Uw62cuBKLb7o3zpK7hQ&s=o-tR0mZ5yKNTTXKX1MR7NuDLpHfvSHIjzi47YLue0aA&e=

Lucas,

Any thoughts on why enabling MSI on IMX6 breaks legacy interrupts?

Again, many PCI devices/drivers don't support MSI and thus enabling MSI as this patch does makes this config break many PCI devices on IMX6.

I have found that MSI does indeed work on the IMX6 for cards/drivers that use MSI, but for those that don't the legacy interrupts never fire regardless of going through a bridge or directly hanging off the IMX6. I assume you can confirm this on your boards/devices as well?

Quoted 5 lines
Quoted 5 lines

No, this seems to be an errata in the DW PCIe core. The manual states that legacy IRQs and MSIs can't be used together, but I thought this only applies to the EP part of the core.

We can probably fix the simple configuration by not enabling MSI

support

Quoted 20 lines
Quoted 9 lines

until someone actually requests to set up an MSI IRQ, so both IRQ types work when only one EP is connected.
I don't have any idea yet how to fix setups with a PCIe switch where some connected EPs might like to use MSIs while some others can't use them.

Regards,
Lucas

Lucas,

I feel a bit dumb here for forgetting about this issue and letting it drop, but I've just spent a day debugging an issue with the ath9k wireless driver only to realize it was that the ath9k card and/or driver doesn't support MSI interrupts and thus no longer work on mainline kernels that have MSI enabled. To be honest I'm not sure how many PCIe devices out there can't support MSI because of hardware limitations vs drivers that simply have not implemented it.

Quoted 8 lines

To make matters worse 3ee803641e76bea76ec730c80dcc64739a9919ff makes it such that you can't disable MSI on the IMX6.

Is there some fix you can think of to make the IMX6 PCIe host controller raise an interrupt for cards/drivers that use legacy irq's? If not, then we need to allow MSI to be disabled for IMX6 and default it to disabled for compatibility.

Joao / Jingoo,

Quoted 8 lines

(Adding linux-pci to the list to pick up maintainers of other DWC PCIe core drivers)

Is Luca's statement that 'legacy IRQs and MSIs can't be used together' true in general for the DW PCIe core? If any of the host controllers using this core can't support both legacy and MSI irqs together I still believe we shouldn't enable/require MSI as it breaks any card/driver that only supports legacy interrupts (such as ath9k).

Quoted 9 lines

If there are 2 DW PCIe controllers, one controller can be used for legacy and another controller can be used for MSI.

But, I am not sure that one DW PCIe controller can support both MSI device and legacy interrupt device at the same time.

To Joao Pinto,
Will you confirm this?

Hi Jingoo,
I confirm that if a RC has MSI enable, it won't support legacy interrupts.

Regards,
Joao

Quoted 11 lines

Or if there is anyone who knows this well, please share your knowledge. :-) Thanks.

Best regards,
Jingoo Han

Quoted 4 lines

Regards,

Tim

#9 lore raw

PATCH 2/2 ARM: imx_v6_v7_defconfig: enable PCI_MSI

Am Mittwoch, den 05.04.2017, 13:07 +0100 schrieb Joao Pinto:
[...]

Quoted 36 lines
Quoted 36 lines
Quoted 21 lines
Quoted 10 lines

Lucas,

I feel a bit dumb here for forgetting about this issue and letting it drop, but I've just spent a day debugging an issue with the ath9k wireless driver only to realize it was that the ath9k card and/or driver doesn't support MSI interrupts and thus no longer work on mainline kernels that have MSI enabled. To be honest I'm not sure how many PCIe devices out there can't support MSI because of hardware limitations vs drivers that simply have not implemented it.

Quoted 8 lines

To make matters worse 3ee803641e76bea76ec730c80dcc64739a9919ff makes it such that you can't disable MSI on the IMX6.

Is there some fix you can think of to make the IMX6 PCIe host controller raise an interrupt for cards/drivers that use legacy irq's? If not, then we need to allow MSI to be disabled for IMX6 and default it to disabled for compatibility.

Joao / Jingoo,

Quoted 8 lines

(Adding linux-pci to the list to pick up maintainers of other DWC PCIe core drivers)

Is Luca's statement that 'legacy IRQs and MSIs can't be used together' true in general for the DW PCIe core? If any of the host controllers using this core can't support both legacy and MSI irqs together I still believe we shouldn't enable/require MSI as it breaks any card/driver that only supports legacy interrupts (such as ath9k).

If there are 2 DW PCIe controllers, one controller can be used for legacy and another controller can be used for MSI.

But, I am not sure that one DW PCIe controller can support both MSI device and legacy interrupt device at the same time.

Quoted 6 lines
Quoted 3 lines

To Joao Pinto,
Will you confirm this?

Hi Jingoo,
I confirm that if a RC has MSI enable, it won't support legacy interrupts.

Okay, so the only way to solve this in a generic way, that I can see at the moment is to defer MSI enable until the downstream device actually requests an MSI irq.

Also we need to disable the MSI capability if any bridge device turns up during the bus topology scan, as we can have devices with conflicting requirements connected to the RC in that case.

I'll cook up some patches to implement this.

Regards,
Lucas

#10 lore raw

PATCH 2/2 ARM: imx_v6_v7_defconfig: enable PCI_MSI

Quoted 49 lines · Lucas Stach

Am Mittwoch, den 05.04.2017, 13:07 +0100 schrieb Joao Pinto:
[...]

Quoted 36 lines
Quoted 36 lines
Quoted 21 lines
Quoted 10 lines

Lucas,

I feel a bit dumb here for forgetting about this issue and letting it drop, but I've just spent a day debugging an issue with the ath9k wireless driver only to realize it was that the ath9k card and/or driver doesn't support MSI interrupts and thus no longer work on mainline kernels that have MSI enabled. To be honest I'm not sure how many PCIe devices out there can't support MSI because of hardware limitations vs drivers that simply have not implemented it.

Quoted 8 lines

To make matters worse 3ee803641e76bea76ec730c80dcc64739a9919ff makes it such that you can't disable MSI on the IMX6.

Is there some fix you can think of to make the IMX6 PCIe host controller raise an interrupt for cards/drivers that use legacy irq's? If not, then we need to allow MSI to be disabled for IMX6 and default it to disabled for compatibility.

Joao / Jingoo,

Quoted 8 lines

(Adding linux-pci to the list to pick up maintainers of other DWC PCIe core drivers)

Is Luca's statement that 'legacy IRQs and MSIs can't be used together' true in general for the DW PCIe core? If any of the host controllers using this core can't support both legacy and MSI irqs together I still believe we shouldn't enable/require MSI as it breaks any card/driver that only supports legacy interrupts (such as ath9k).

If there are 2 DW PCIe controllers, one controller can be used for legacy and another controller can be used for MSI.

But, I am not sure that one DW PCIe controller can support both MSI device and legacy interrupt device at the same time.

Quoted 6 lines
Quoted 3 lines

To Joao Pinto,
Will you confirm this?

Hi Jingoo,
I confirm that if a RC has MSI enable, it won't support legacy interrupts.

Okay, so the only way to solve this in a generic way, that I can see at the moment is to defer MSI enable until the downstream device actually requests an MSI irq.

Quoted 6 lines

Also we need to disable the MSI capability if any bridge device turns up during the bus topology scan, as we can have devices with conflicting requirements connected to the RC in that case.

I'll cook up some patches to implement this.

Lucas,

Any thoughts yet? I'll likely want to backport this to stable although the restructuring to drivers/pci/dwc and subsequent changes since 4.10 will likely require a re-written patch.

Best regards,

Tim

#11 lore raw

PATCH 2/2 ARM: imx_v6_v7_defconfig: enable PCI_MSI

Hi Tim,

Am Dienstag, den 11.04.2017, 09:05 -0700 schrieb Tim Harvey:

Quoted 54 lines · Lucas Stach
Quoted 53 lines

Am Mittwoch, den 05.04.2017, 13:07 +0100 schrieb Joao Pinto:
[...]

Quoted 36 lines
Quoted 36 lines
Quoted 21 lines
Quoted 10 lines

Lucas,

I feel a bit dumb here for forgetting about this issue and letting it drop, but I've just spent a day debugging an issue with the ath9k wireless driver only to realize it was that the ath9k card and/or driver doesn't support MSI interrupts and thus no longer work on mainline kernels that have MSI enabled. To be honest I'm not sure how many PCIe devices out there can't support MSI because of hardware limitations vs drivers that simply have not implemented it.

Quoted 8 lines

To make matters worse 3ee803641e76bea76ec730c80dcc64739a9919ff makes it such that you can't disable MSI on the IMX6.

Is there some fix you can think of to make the IMX6 PCIe host controller raise an interrupt for cards/drivers that use legacy irq's? If not, then we need to allow MSI to be disabled for IMX6 and default it to disabled for compatibility.

Joao / Jingoo,

Quoted 8 lines

(Adding linux-pci to the list to pick up maintainers of other DWC PCIe core drivers)

Is Luca's statement that 'legacy IRQs and MSIs can't be used together' true in general for the DW PCIe core? If any of the host controllers using this core can't support both legacy and MSI irqs together I still believe we shouldn't enable/require MSI as it breaks any card/driver that only supports legacy interrupts (such as ath9k).

If there are 2 DW PCIe controllers, one controller can be used for legacy and another controller can be used for MSI.

But, I am not sure that one DW PCIe controller can support both MSI device and legacy interrupt device at the same time.

Quoted 6 lines
Quoted 3 lines

To Joao Pinto,
Will you confirm this?

Hi Jingoo,
I confirm that if a RC has MSI enable, it won't support legacy interrupts.

Okay, so the only way to solve this in a generic way, that I can see at the moment is to defer MSI enable until the downstream device actually requests an MSI irq.

Also we need to disable the MSI capability if any bridge device turns up during the bus topology scan, as we can have devices with conflicting requirements connected to the RC in that case.

Quoted 8 lines
Quoted 2 lines

I'll cook up some patches to implement this.

Lucas,

Any thoughts yet? I'll likely want to backport this to stable although the restructuring to drivers/pci/dwc and subsequent changes since 4.10 will likely require a re-written patch.

I have a fix for this, that I'm currently testing on different setups. I'll probably send it out in a few hours.

Regards,
Lucas

#12 lore raw

PATCH 1/2 ARM: imx6: remove config space from PCIe controller ranges property

In reply to Lucas Stach
Quoted 6 lines · Lucas Stach

This has been moved to the reg property where it belongs for quite some time. The range has been unused by the kernel since then and with kernel 4.4 it's flagged as an unparsable range, as it does not comply to the PCI ranges DT binding. Fix this by removing the superfluous range.

Changed patch prefix to 'ARM: dts: imx6: ...', and applied.

Shawn

Quoted 22 lines
---
 arch/arm/boot/dts/imx6qdl.dtsi | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)
arch/arm/boot/dts/imx6qdl.dtsi +1 -2
index 2b6cc8bf3c5c..a5a731519d9e 100644
@@ -173,8 +173,7 @@
 			#address-cells = <3>;
 			#size-cells = <2>;
 			device_type = "pci";
-			ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000 /* configuration space */
-				  0x81000000 0 0          0x01f80000 0 0x00010000 /* downstream I/O */
+			ranges = <0x81000000 0 0          0x01f80000 0 0x00010000 /* downstream I/O */
 				  0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
 			num-lanes = <1>;
 			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
Signature · 1 line
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