AArch64: Fix single stepping of ERET instruction

Previously when single stepping through ERET instruction via GDB would result in debugger entering the "next" PC after ERET instruction. When debugging in kernel mode, this will also cause unintended behavior, because debugger will try to access memory from EL0 point of view.

---
 target/arm/translate-a64.c | 1 +
 1 file changed, 1 insertion(+)

index 9017e30510..1bc12d93ca 100644
@@ -11348,6 +11348,7 @@ static void aarch64_tr_tb_stop(DisasContextBase

*dcbase, CPUState *cpu)

         default:
             gen_a64_set_pc_im(dc->pc);
             /* fall through */
+        case DISAS_EXIT:
         case DISAS_JUMP:
             if (dc->base.singlestep_enabled) {
                 gen_exception_internal(EXCP_DEBUG);

2.14.1