ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310
Subsystems (8)
cover ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310
This patch set changes to ARCH_EXYNOS4 from ARCH_S5PV310 for supporting Samsung's new brand name EXYNOS. Samsung officially announced about the brand name of EXYNOS at MWC 2011 and The EXYNOS4 integrates a ARM Cortex A9 microporcessor with several other peripherals to support features such as multimedai, storage, graphics and gaming. Especially, the EXYNOS4210 CPU which is one of EXYNOS4 SoC series can be used in products such as Mobile devices.
This patch set consists of the following patches.
[PATCH 01/11] ARM: EXYNOS4: Add EXYNOS4 CPU initialization support [PATCH 02/11] ARM: EXYNOS4: Update Clock part
[PATCH 03/11] ARM: EXYNOS4: Update IRQ part
[PATCH 04/11] ARM: EXYNOS4: Update Timer part
[PATCH 05/11] ARM: EXYNOS4: Update device support
[PATCH 06/11] ARM: EXYNOS4: Moved board support files
[PATCH 07/11] ARM: EXYNOS4: Update Kconfig and Makefile for the new ARCH_EXYNOS4 [PATCH 08/11] ARM: exynos4_defconfig: Add defconfig for EXYNOS4 [PATCH 09/11] mtd: OneNAND: Change dependency of ARCH_EXYNOS4 [PATCH 10/11] ASoC: Change dependency of ARCH_EXYNOS4
[PATCH 11/11] tty: Change dependency of ARCH_EXYNOS4
PATCH 1/11 ARM: EXYNOS4: Add EXYNOS4 CPU initialization support
This patch adds EXYNOS4 CPU support files in mach-exynos4, and basically they are moved from mach-s5pv310 so that it can support Samsung's new CPU name, EXYNOS4.
The EXYNOS4 ingegrates a ARM Cortex A9 multi-core.
Signed-off-by Kukjin Kim <[email protected]>
---
arch/arm/{mach-s5pv310 => mach-exynos4}/cpu.c | 87 ++++++------
arch/arm/{mach-s5pv310 => mach-exynos4}/cpufreq.c | 100 +++++++-------
arch/arm/{mach-s5pv310 => mach-exynos4}/dma.c | 50 ++++---
arch/arm/{mach-s5pv310 => mach-exynos4}/gpiolib.c | 154 ++++++++++----------
arch/arm/{mach-s5pv310 => mach-exynos4}/headsmp.S | 6 +-
arch/arm/{mach-s5pv310 => mach-exynos4}/hotplug.c | 2 +-
.../include/mach/debug-macro.S | 6 +-
.../include/mach/dma.h | 0
.../include/mach/entry-macro.S | 4 +-
arch/arm/mach-exynos4/include/mach/gpio.h | 135 +++++++++++++++++
.../include/mach/hardware.h | 8 +-
.../include/mach/io.h | 8 +-
arch/arm/mach-exynos4/include/mach/map.h | 144 ++++++++++++++++++
.../include/mach/memory.h | 8 +-
arch/arm/mach-exynos4/include/mach/regs-gpio.h | 42 ++++++
.../include/mach/regs-mem.h | 6 +-
.../include/mach/regs-pmu.h | 8 +-
.../include/mach/regs-sysmmu.h | 6 +-
.../include/mach/smp.h | 2 +-
.../include/mach/sysmmu.h | 18 +-
.../include/mach/system.h | 8 +-
.../include/mach/timex.h | 8 +-
.../include/mach/uncompress.h | 8 +-
.../include/mach/vmalloc.h | 8 +-
arch/arm/{mach-s5pv310 => mach-exynos4}/init.c | 10 +-
arch/arm/{mach-s5pv310 => mach-exynos4}/platsmp.c | 12 +-
.../{mach-s5pv310 => mach-exynos4}/setup-i2c0.c | 4 +-
arch/arm/mach-s5pv310/include/mach/gpio.h | 135 -----------------
arch/arm/mach-s5pv310/include/mach/map.h | 144 ------------------
arch/arm/mach-s5pv310/include/mach/regs-gpio.h | 42 ------
arch/arm/plat-s5p/cpu.c | 25 ++--
arch/arm/plat-s5p/include/plat/exynos4.h | 34 +++++
arch/arm/plat-s5p/include/plat/s5pv310.h | 34 -----
33 files changed, 637 insertions(+), 629 deletions(-)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/cpu.c (67%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/cpufreq.c (82%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/dma.c (74%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/gpiolib.c (58%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/headsmp.S (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/hotplug.c (98%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/debug-macro.S (86%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/dma.h (100%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/entry-macro.S (95%)
create mode 100644 arch/arm/mach-exynos4/include/mach/gpio.h
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/hardware.h (67%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/io.h (76%)
create mode 100644 arch/arm/mach-exynos4/include/mach/map.h
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/memory.h (71%)
create mode 100644 arch/arm/mach-exynos4/include/mach/regs-gpio.h
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/regs-mem.h (74%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/regs-pmu.h (77%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/regs-sysmmu.h (79%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/smp.h (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/sysmmu.h (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/system.h (69%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/timex.h (81%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/uncompress.h (80%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/vmalloc.h (72%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/init.c (73%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/platsmp.c (92%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-i2c0.c (87%)
delete mode 100644 arch/arm/mach-s5pv310/include/mach/gpio.h
delete mode 100644 arch/arm/mach-s5pv310/include/mach/map.h
delete mode 100644 arch/arm/mach-s5pv310/include/mach/regs-gpio.h
create mode 100644 arch/arm/plat-s5p/include/plat/exynos4.h
delete mode 100644 arch/arm/plat-s5p/include/plat/s5pv310.harch/arm/mach-exynos4/cpu.c renamed from arch/arm/mach-s5pv310/cpu.c +44 -43
@@ -1,7 +1,7 @@ -/* linux/arch/arm/mach-s5pv310/cpu.c +/* linux/arch/arm/mach-exynos4/cpu.c * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
@@ -19,7 +19,7 @@#include <plat/cpu.h> #include <plat/clock.h> -#include <plat/s5pv310.h> +#include <plat/exynos4.h> #include <plat/sdhci.h> #include <mach/regs-irq.h>
@@ -29,55 +29,55 @@ extern int combiner_init(unsigned int combiner_nr, void __iomem *base,extern void combiner_cascade_irq (unsigned int combiner_nr,unsigned int irq);/* Initial IO mappings */ -static struct map_desc s5pv310_iodesc[]__initdata = { +static struct map_desc exynos4_iodesc[]__initdata = { { .virtual = (unsigned long )S5P_VA_SYSRAM , - .pfn =__phys_to_pfn (S5PV310_PA_SYSRAM ), + .pfn =__phys_to_pfn (EXYNOS4_PA_SYSRAM ), .length =SZ_4K , .type =MT_DEVICE , }, { .virtual = (unsigned long )S5P_VA_CMU , - .pfn =__phys_to_pfn (S5PV310_PA_CMU ), + .pfn =__phys_to_pfn (EXYNOS4_PA_CMU ), .length =SZ_128K , .type =MT_DEVICE , }, { .virtual = (unsigned long )S5P_VA_PMU , - .pfn =__phys_to_pfn (S5PV310_PA_PMU ), + .pfn =__phys_to_pfn (EXYNOS4_PA_PMU ), .length =SZ_64K , .type =MT_DEVICE , }, { .virtual = (unsigned long )S5P_VA_COMBINER_BASE , - .pfn =__phys_to_pfn (S5PV310_PA_COMBINER ), + .pfn =__phys_to_pfn (EXYNOS4_PA_COMBINER ), .length =SZ_4K , .type =MT_DEVICE , }, { .virtual = (unsigned long )S5P_VA_COREPERI_BASE , - .pfn =__phys_to_pfn (S5PV310_PA_COREPERI ), + .pfn =__phys_to_pfn (EXYNOS4_PA_COREPERI ), .length =SZ_8K , .type =MT_DEVICE , }, { .virtual = (unsigned long )S5P_VA_L2CC , - .pfn =__phys_to_pfn (S5PV310_PA_L2CC ), + .pfn =__phys_to_pfn (EXYNOS4_PA_L2CC ), .length =SZ_4K , .type =MT_DEVICE , }, { .virtual = (unsigned long )S5P_VA_GPIO1 , - .pfn =__phys_to_pfn (S5PV310_PA_GPIO1 ), + .pfn =__phys_to_pfn (EXYNOS4_PA_GPIO1 ), .length =SZ_4K , .type =MT_DEVICE , }, { .virtual = (unsigned long )S5P_VA_GPIO2 , - .pfn =__phys_to_pfn (S5PV310_PA_GPIO2 ), + .pfn =__phys_to_pfn (EXYNOS4_PA_GPIO2 ), .length =SZ_4K , .type =MT_DEVICE , }, { .virtual = (unsigned long )S5P_VA_GPIO3 , - .pfn =__phys_to_pfn (S5PV310_PA_GPIO3 ), + .pfn =__phys_to_pfn (EXYNOS4_PA_GPIO3 ), .length =SZ_256 , .type =MT_DEVICE , }, { .virtual = (unsigned long )S5P_VA_DMC0 , - .pfn =__phys_to_pfn (S5PV310_PA_DMC0 ), + .pfn =__phys_to_pfn (EXYNOS4_PA_DMC0 ), .length =SZ_4K , .type =MT_DEVICE , }, {
@@ -87,13 +87,13 @@ static struct map_desc s5pv310_iodesc[] __initdata = { .type = MT_DEVICE, }, { .virtual = (unsigned long)S5P_VA_SROMC, - .pfn = __phys_to_pfn(S5PV310_PA_SROMC), + .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC), .length = SZ_4K, .type = MT_DEVICE, }, }; -static void s5pv310_idle (void ) +static void exynos4_idle (void ) {if (!need_resched ())cpu_do_idle ();
@@ -101,32 +101,33 @@ static void s5pv310_idle(void)local_irq_enable (); } -/* s5pv310_map_io +/* +* exynos4_map_io * * register the standard cpu IO areas -*/ -void __init s5pv310_map_io (void ) +*/ +void __init exynos4_map_io (void ) { -iotable_init (s5pv310_iodesc,ARRAY_SIZE (s5pv310_iodesc)); +iotable_init (exynos4_iodesc,ARRAY_SIZE (exynos4_iodesc));/* initialize device information early */ -s5pv310_default_sdhci0 (); -s5pv310_default_sdhci1 (); -s5pv310_default_sdhci2 (); -s5pv310_default_sdhci3 (); +exynos4_default_sdhci0 (); +exynos4_default_sdhci1 (); +exynos4_default_sdhci2 (); +exynos4_default_sdhci3 (); } -void __init s5pv310_init_clocks (int xtal) +void __init exynos4_init_clocks (int xtal) {printk (KERN_DEBUG "%s: initializing clocks\n" , __func__);s3c24xx_register_baseclocks (xtal);s5p_register_clocks (xtal); -s5pv310_register_clocks (); -s5pv310_setup_clocks (); +exynos4_register_clocks (); +exynos4_setup_clocks (); } -void __init s5pv310_init_irq (void ) +void __init exynos4_init_irq (void ) {int irq;
@@ -148,29 +149,29 @@ void __init s5pv310_init_irq(void) }/* The parameters of s5p_init_irq() are for VIC init. -* Theses parameters should be NULL and 0 because S5PV310 +* Theses parameters should be NULL and 0 because EXYNOS4 * uses GIC instead of VIC. */ s5p_init_irq (NULL ,0 ); } -struct sysdev_class s5pv310_sysclass = { - .name ="s5pv310-core" , +struct sysdev_class exynos4_sysclass = { + .name ="exynos4-core" , }; -static struct sys_device s5pv310_sysdev = { - .cls = &s5pv310_sysclass, +static struct sys_device exynos4_sysdev = { + .cls = &exynos4_sysclass, }; -static int __init s5pv310_core_init (void ) +static int __init exynos4_core_init (void ) { -return sysdev_class_register (&s5pv310_sysclass); +return sysdev_class_register (&exynos4_sysclass); } -core_initcall (s5pv310_core_init); +core_initcall (exynos4_core_init);#ifdef CONFIG_CACHE_L2X0 -static int __init s5pv310_l2x0_cache_init (void ) +static int __init exynos4_l2x0_cache_init (void ) {/* TAG, Data Latency Control: 2cycle */ __raw_writel (0x110 ,S5P_VA_L2CC +L2X0_TAG_LATENCY_CTRL );
@@ -188,15 +189,15 @@ static int __init s5pv310_l2x0_cache_init(void) return 0; } -early_initcall (s5pv310_l2x0_cache_init); +early_initcall (exynos4_l2x0_cache_init);#endif -int __init s5pv310_init (void ) +int __init exynos4_init (void ) { -printk (KERN_INFO "S5PV310: Initializing architecture\n" ); +printk (KERN_INFO "EXYNOS4: Initializing architecture\n" );/* set idle function */ - pm_idle = s5pv310_idle; + pm_idle = exynos4_idle; -return sysdev_register (&s5pv310_sysdev); +return sysdev_register (&exynos4_sysdev); }
arch/arm/mach-exynos4/cpufreq.c renamed from arch/arm/mach-s5pv310/cpufreq.c +50 -50
265 lines not on this page · raw message
arch/arm/mach-exynos4/dma.c renamed from arch/arm/mach-s5pv310/dma.c +27 -23
104 lines not on this page · raw message
arch/arm/mach-exynos4/gpiolib.c renamed from arch/arm/mach-s5pv310/gpiolib.c +77 -77
334 lines not on this page · raw message
arch/arm/mach-exynos4/headsmp.S renamed from arch/arm/mach-s5pv310/headsmp.S +3 -3
@@ -1,5 +1,5 @@ /* - * linux/arch/arm/mach-s5pv310/headsmp.S + * linux/arch/arm/mach-exynos4/headsmp.S * * Cloned from linux/arch/arm/mach-realview/headsmp.S *
@@ -16,11 +16,11 @@ __INIT /* - * s5pv310 specific entry point for secondary CPUs. This provides + * exynos4 specific entry point for secondary CPUs. This provides * a "holding pen" into which all secondary cores are held until we're * ready for them to initialise. */ -ENTRY(s5pv310_secondary_startup) +ENTRY(exynos4_secondary_startup) mrc p15, 0, r0, c0, c0, 5 and r0, r0, #15 adr r4, 1f
arch/arm/mach-exynos4/hotplug.c renamed from arch/arm/mach-s5pv310/hotplug.c +1 -1
@@ -1,4 +1,4 @@ -/* linux arch/arm/mach-s5pv310/hotplug.c +/* linux arch/arm/mach-exynos4/hotplug.c * * Cloned from linux/arch/arm/mach-realview/hotplug.c *
arch/arm/mach-exynos4/include/mach/debug-macro.S renamed from arch/arm/mach-s5pv310/include/mach/debug-macro.S +3 -3
@@ -1,7 +1,7 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/debug-macro.S +/* linux/arch/arm/mach-exynos4/include/mach/debug-macro.S * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ + * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com * * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S *
arch/arm/mach-exynos4/include/mach/dma.h renamed from arch/arm/mach-s5pv310/include/mach/dma.h +0 -0
arch/arm/mach-exynos4/include/mach/entry-macro.S renamed from arch/arm/mach-s5pv310/include/mach/entry-macro.S +2 -2
@@ -1,8 +1,8 @@ -/* arch/arm/mach-s5pv310/include/mach/entry-macro.S +/* arch/arm/mach-exynos4/include/mach/entry-macro.S * * Cloned from arch/arm/mach-realview/include/mach/entry-macro.S * - * Low-level IRQ helper macros for S5PV310 platforms + * Low-level IRQ helper macros for EXYNOS4 platforms * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any
arch/arm/mach-exynos4/include/mach/gpio.h new file +135 -0
135 lines not on this page · raw message
arch/arm/mach-exynos4/include/mach/hardware.h renamed from arch/arm/mach-s5pv310/include/mach/hardware.h +4 -4
@@ -1,9 +1,9 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/hardware.h +/* linux/arch/arm/mach-exynos4/include/mach/hardware.h * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * -* S5PV310 - Hardware support +* EXYNOS4 - Hardware support * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
arch/arm/mach-exynos4/include/mach/io.h renamed from arch/arm/mach-s5pv310/include/mach/io.h +4 -4
@@ -1,13 +1,13 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/io.h +/* linux/arch/arm/mach-exynos4/include/mach/io.h * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * * Copyright 2008-2010 Ben Dooks <[email protected]> * * Based on arch/arm/mach-s5p6442/include/mach/io.h * -* Default IO routines for S5PV310 +* Default IO routines for EXYNOS4 * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
arch/arm/mach-exynos4/include/mach/map.h new file +144 -0
144 lines not on this page · raw message
arch/arm/mach-exynos4/include/mach/memory.h renamed from arch/arm/mach-s5pv310/include/mach/memory.h +4 -4
@@ -1,9 +1,9 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/memory.h +/* linux/arch/arm/mach-exynos4/include/mach/memory.h * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * -* S5PV310 - Memory definitions +* EXYNOS4 - Memory definitions * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
arch/arm/mach-exynos4/include/mach/regs-gpio.h new file +42 -0
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arch/arm/mach-exynos4/include/mach/regs-mem.h renamed from arch/arm/mach-s5pv310/include/mach/regs-mem.h +3 -3
@@ -1,9 +1,9 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/regs-mem.h +/* linux/arch/arm/mach-exynos4/include/mach/regs-mem.h * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. * http://www.samsung.com * -* S5PV310 - SROMC and DMC register definitions +* EXYNOS4 - SROMC and DMC register definitions * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
arch/arm/mach-exynos4/include/mach/regs-pmu.h renamed from arch/arm/mach-s5pv310/include/mach/regs-pmu.h +4 -4
@@ -1,9 +1,9 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/regs-pmu.h +/* linux/arch/arm/mach-exynos4/include/mach/regs-pmu.h * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. * http://www.samsung.com * -* S5PV310 - Power management unit definition +* EXYNOS4 - Power management unit definition * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
@@ -18,7 +18,7 @@#define S5P_PMUREG (x) (S5P_VA_PMU + (x))#define S5P_PMU_CAM_CONF S5P_PMUREG(0x3C00) -#define S5P_PMU_TV_CONF S5P_PMUREG(0x3C20) +#define S5P_PMU_TV_CONF S5P_PMUREG(0x3C20)#define S5P_PMU_MFC_CONF S5P_PMUREG(0x3C40)#define S5P_PMU_G3D_CONF S5P_PMUREG(0x3C60)#define S5P_PMU_LCD0_CONF S5P_PMUREG(0x3C80)
arch/arm/mach-exynos4/include/mach/regs-sysmmu.h renamed from arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h +3 -3
@@ -1,9 +1,9 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h +/* linux/arch/arm/mach-exynos4/include/mach/regs-sysmmu.h * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. * http://www.samsung.com * -* S5PV310 - System MMU register +* EXYNOS4 - System MMU register * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
arch/arm/mach-exynos4/include/mach/smp.h renamed from arch/arm/mach-s5pv310/include/mach/smp.h +1 -1
@@ -1,4 +1,4 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/smp.h +/* linux/arch/arm/mach-exynos4/include/mach/smp.h * * Cloned from arch/arm/mach-realview/include/mach/smp.h */
arch/arm/mach-exynos4/include/mach/sysmmu.h renamed from arch/arm/mach-s5pv310/include/mach/sysmmu.h +9 -9
@@ -1,9 +1,9 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/sysmmu.h +/* linux/arch/arm/mach-exynos4/include/mach/sysmmu.h * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * -* Samsung sysmmu driver for S5PV310 +* Samsung sysmmu driver for EXYNOS4 * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
@@ -13,10 +13,10 @@#ifndef __ASM_ARM_ARCH_SYSMMU_H#define __ASM_ARM_ARCH_SYSMMU_H __FILE__ -#define S5PV310_SYSMMU_TOTAL_IPNUM 16 -#define S5P_SYSMMU_TOTAL_IPNUM S5PV310_SYSMMU_TOTAL_IPNUM +#define EXYNOS4_SYSMMU_TOTAL_IPNUM 16 +#define S5P_SYSMMU_TOTAL_IPNUM EXYNOS4_SYSMMU_TOTAL_IPNUM -enum s5pv310_sysmmu_ips { +enum exynos4_sysmmu_ips {SYSMMU_MDMA ,SYSMMU_SSS , SYSMMU_FIMC0,
@@ -35,7 +35,7 @@ enum s5pv310_sysmmu_ips { SYSMMU_MFC_R, }; -static char *sysmmu_ips_name[S5PV310_SYSMMU_TOTAL_IPNUM ] = { +static char *sysmmu_ips_name[EXYNOS4_SYSMMU_TOTAL_IPNUM ] = {"SYSMMU_MDMA" ,"SYSMMU_SSS" ,"SYSMMU_FIMC0" ,
@@ -54,7 +54,7 @@ static char *sysmmu_ips_name[S5PV310_SYSMMU_TOTAL_IPNUM] = { "SYSMMU_MFC_R" , }; -typedef enum s5pv310_sysmmu_ips sysmmu_ips ; +typedef enum exynos4_sysmmu_ips sysmmu_ips ;struct sysmmu_tt_info {unsigned long *pgd;
arch/arm/mach-exynos4/include/mach/system.h renamed from arch/arm/mach-s5pv310/include/mach/system.h +4 -4
@@ -1,9 +1,9 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/system.h +/* linux/arch/arm/mach-exynos4/include/mach/system.h * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * -* S5PV310 - system support header +* EXYNOS4 - system support header * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
arch/arm/mach-exynos4/include/mach/timex.h renamed from arch/arm/mach-s5pv310/include/mach/timex.h +4 -4
@@ -1,14 +1,14 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/timex.h +/* linux/arch/arm/mach-exynos4/include/mach/timex.h * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * * Copyright (c) 2003-2010 Simtec Electronics * Ben Dooks <[email protected]> * * Based on arch/arm/mach-s5p6442/include/mach/timex.h * -* S5PV310 - time parameters +* EXYNOS4 - time parameters * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
arch/arm/mach-exynos4/include/mach/uncompress.h renamed from arch/arm/mach-s5pv310/include/mach/uncompress.h +4 -4
@@ -1,9 +1,9 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/uncompress.h +/* linux/arch/arm/mach-exynos4/include/mach/uncompress.h * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * -* S5PV310 - uncompress code +* EXYNOS4 - uncompress code * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
arch/arm/mach-exynos4/include/mach/vmalloc.h renamed from arch/arm/mach-s5pv310/include/mach/vmalloc.h +4 -4
@@ -1,7 +1,7 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/vmalloc.h +/* linux/arch/arm/mach-exynos4/include/mach/vmalloc.h * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * * Copyright 2010 Ben Dooks <[email protected]> *
@@ -11,7 +11,7 @@* it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * -* S5PV310 vmalloc definition +* EXYNOS4 vmalloc definition */ #ifndef __ASM_ARCH_VMALLOC_H
arch/arm/mach-exynos4/init.c renamed from arch/arm/mach-s5pv310/init.c +5 -5
@@ -1,4 +1,4 @@ -/* linux/arch/arm/mach-s5pv310/init.c +/* linux/arch/arm/mach-exynos4/init.c * * Copyright (c) 2010 Samsung Electronics Co., Ltd. * http://www.samsung.com/
@@ -14,7 +14,7 @@#include <plat/devs.h> #include <plat/regs-serial.h> -static struct s3c24xx_uart_clksrc s5pv310_serial_clocks[] = { +static struct s3c24xx_uart_clksrc exynos4_serial_clocks[] = { [0 ] = { .name ="uclk1" , .divisor =1 ,
@@ -24,7 +24,7 @@ static struct s3c24xx_uart_clksrc s5pv310_serial_clocks[] = { };/* uart registration process */ -void __init s5pv310_common_init_uarts (struct s3c2410_uartcfg *cfg,int no) +void __init exynos4_common_init_uarts (struct s3c2410_uartcfg *cfg,int no) {struct s3c2410_uartcfg *tcfg = cfg;u32 ucnt;
@@ -32,8 +32,8 @@ void __init s5pv310_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)for (ucnt =0 ; ucnt < no; ucnt++, tcfg++) {if (!tcfg->clocks) { tcfg->has_fracval =1 ; - tcfg->clocks = s5pv310_serial_clocks; - tcfg->clocks_size =ARRAY_SIZE (s5pv310_serial_clocks); + tcfg->clocks = exynos4_serial_clocks; + tcfg->clocks_size =ARRAY_SIZE (exynos4_serial_clocks); } }
arch/arm/mach-exynos4/platsmp.c renamed from arch/arm/mach-s5pv310/platsmp.c +6 -6
@@ -1,7 +1,7 @@ -/* linux/arch/arm/mach-s5pv310/platsmp.c +/* linux/arch/arm/mach-exynos4/platsmp.c * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * * Cloned from linux/arch/arm/mach-vexpress/platsmp.c *
@@ -28,7 +28,7 @@#include <mach/hardware.h> #include <mach/regs-clock.h> -extern void s5pv310_secondary_startup (void ); +extern void exynos4_secondary_startup (void );/* * control for which core is the next to come out of the secondary
@@ -139,7 +139,7 @@ void __init smp_init_cpus(void)/* sanity check */ if (ncores >NR_CPUS ) {printk (KERN_WARNING -"S5PV310: no. of cores (%d) greater than configured " +"EXYNOS4: no. of cores (%d) greater than configured " "maximum of %d - clipping\n" , ncores,NR_CPUS ); ncores =NR_CPUS ;
@@ -168,5 +168,5 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)* until it receives a soft interrupt, and then the * secondary CPU branches to this address. */ -__raw_writel (BSYM (virt_to_phys (s5pv310_secondary_startup)),S5P_VA_SYSRAM ); +__raw_writel (BSYM (virt_to_phys (exynos4_secondary_startup)),S5P_VA_SYSRAM ); }
arch/arm/mach-exynos4/setup-i2c0.c renamed from arch/arm/mach-s5pv310/setup-i2c0.c +2 -2
@@ -1,5 +1,5 @@/* -* linux/arch/arm/mach-s5pv310/setup-i2c0.c +* linux/arch/arm/mach-exynos4/setup-i2c0.c * * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. * http://www.samsung.com/
@@ -21,6 +21,6 @@ struct platform_device; /* don't need the contents */void s3c_i2c0_cfg_gpio (struct platform_device *dev) { -s3c_gpio_cfgall_range (S5PV310_GPD1 (0 ),2 , +s3c_gpio_cfgall_range (EXYNOS4_GPD1 (0 ),2 ,S3C_GPIO_SFN (2 ),S3C_GPIO_PULL_UP ); }
arch/arm/mach-s5pv310/include/mach/gpio.h deleted +0 -135
135 lines not on this page · raw message
arch/arm/mach-s5pv310/include/mach/map.h deleted +0 -144
144 lines not on this page · raw message
arch/arm/mach-s5pv310/include/mach/regs-gpio.h deleted +0 -42
42 lines not on this page · raw message
arch/arm/plat-s5p/cpu.c +14 -11
@@ -1,7 +1,7 @@/* linux/arch/arm/plat-s5p/cpu.c * -* Copyright (c) 2009 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ +* Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * * S5P CPU Support *
@@ -12,17 +12,20 @@#include <linux/init.h> #include <linux/module.h> -#include <mach/map.h> +#include <asm/mach/arch.h> #include <asm/mach/map.h> + +#include <mach/map.h> #include <mach/regs-clock.h> +#include <plat/cpu.h> #include <plat/s5p6440.h> #include <plat/s5p6442.h> #include <plat/s5p6450.h> #include <plat/s5pc100.h> #include <plat/s5pv210.h> -#include <plat/s5pv310.h> +#include <plat/exynos4.h> /* table of supported CPUs */
@@ -31,7 +34,7 @@ static const char name_s5p6442[] = "S5P6442";static const char name_s5p6450[] ="S5P6450" ;static const char name_s5pc100[] ="S5PC100" ;static const char name_s5pv210[] ="S5PV210/S5PC110" ; -static const char name_s5pv310[] ="S5PV310" ; +static const char name_exynos4210[] ="EXYNOS4210" ;static struct cpu_table cpu_ids[]__initdata = { {
@@ -75,13 +78,13 @@ static struct cpu_table cpu_ids[] __initdata = { .init = s5pv210_init, .name = name_s5pv210, }, { - .idcode = 0x43200000, + .idcode = 0x43210000, .idmask = 0xfffff000, - .map_io = s5pv310_map_io, - .init_clocks = s5pv310_init_clocks, - .init_uarts = s5pv310_init_uarts, - .init = s5pv310_init, - .name = name_s5pv310, + .map_io = exynos4_map_io, + .init_clocks = exynos4_init_clocks, + .init_uarts = exynos4_init_uarts, + .init = exynos4_init, + .name = name_exynos4210, }, };
arch/arm/plat-s5p/include/plat/exynos4.h new file +34 -0
@@ -0,0 +1,34 @@ +/* linux/arch/arm/plat-s5p/include/plat/exynos4.h +* +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com +* +* Header file for exynos4 cpu support +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +*/ + +/* Common init code for EXYNOS4 related SoCs */ + +extern void exynos4_common_init_uarts (struct s3c2410_uartcfg *cfg,int no); +extern void exynos4_register_clocks (void ); +extern void exynos4_setup_clocks (void ); + +#ifdef CONFIG_CPU_EXYNOS4210 + +extern int exynos4_init (void ); +extern void exynos4_init_irq (void ); +extern void exynos4_map_io (void ); +extern void exynos4_init_clocks (int xtal); +extern struct sys_timer exynos4_timer; + +#define exynos4_init_uarts exynos4_common_init_uarts + +#else +#define exynos4_init_clocks NULL +#define exynos4_init_uarts NULL +#define exynos4_map_io NULL +#define exynos4_init NULL +#endif
arch/arm/plat-s5p/include/plat/s5pv310.h deleted +0 -34
@@ -1,34 +0,0 @@ -/* linux/arch/arm/plat-s5p/include/plat/s5pv310.h -* -* Copyright (c) 2010 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ -* -* Header file for s5pv310 cpu support -* -* This program is free software; you can redistribute it and/or modify -* it under the terms of the GNU General Public License version 2 as -* published by the Free Software Foundation. -*/ - -/* Common init code for S5PV310 related SoCs */ - -extern void s5pv310_common_init_uarts (struct s3c2410_uartcfg *cfg,int no); -extern void s5pv310_register_clocks (void ); -extern void s5pv310_setup_clocks (void ); - -#ifdef CONFIG_CPU_S5PV310 - -extern int s5pv310_init (void ); -extern void s5pv310_init_irq (void ); -extern void s5pv310_map_io (void ); -extern void s5pv310_init_clocks (int xtal); -extern struct sys_timer s5pv310_timer; - -#define s5pv310_init_uarts s5pv310_common_init_uarts - -#else -#define s5pv310_init_clocks NULL -#define s5pv310_init_uarts NULL -#define s5pv310_map_io NULL -#define s5pv310_init NULL -#endif
Signature · 1 line
1.7.1
PATCH 2/11 ARM: EXYNOS4: Update Clock part
In reply to Kukjin KimThis patch updates Clock part of EXYNOS4 according to the change of ARCH name, EXYNOS4.
Signed-off-by Kukjin Kim <[email protected]>
---
arch/arm/{mach-s5pv310 => mach-exynos4}/clock.c | 190 ++++++++++----------
.../include/mach/regs-clock.h | 8 +-
2 files changed, 99 insertions(+), 99 deletions(-)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/clock.c (83%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/regs-clock.h (97%)arch/arm/mach-exynos4/clock.c renamed from arch/arm/mach-s5pv310/clock.c +95 -95
@@ -1,9 +1,9 @@ -/* linux/arch/arm/mach-s5pv310/clock.c +/* linux/arch/arm/mach-exynos4/clock.c * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * -* S5PV310 - Clock support +* EXYNOS4 - Clock support * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
@@ -46,72 +46,72 @@ static struct clk clk_sclk_usbphy1 = { .id = -1, }; -static int s5pv310_clksrc_mask_top_ctrl (struct clk *clk,int enable) +static int exynos4_clksrc_mask_top_ctrl (struct clk *clk,int enable) {return s5p_gatectrl (S5P_CLKSRC_MASK_TOP , clk, enable); } -static int s5pv310_clksrc_mask_cam_ctrl (struct clk *clk,int enable) +static int exynos4_clksrc_mask_cam_ctrl (struct clk *clk,int enable) {return s5p_gatectrl (S5P_CLKSRC_MASK_CAM , clk, enable); } -static int s5pv310_clksrc_mask_lcd0_ctrl (struct clk *clk,int enable) +static int exynos4_clksrc_mask_lcd0_ctrl (struct clk *clk,int enable) {return s5p_gatectrl (S5P_CLKSRC_MASK_LCD0 , clk, enable); } -static int s5pv310_clksrc_mask_lcd1_ctrl (struct clk *clk,int enable) +static int exynos4_clksrc_mask_lcd1_ctrl (struct clk *clk,int enable) {return s5p_gatectrl (S5P_CLKSRC_MASK_LCD1 , clk, enable); } -static int s5pv310_clksrc_mask_fsys_ctrl (struct clk *clk,int enable) +static int exynos4_clksrc_mask_fsys_ctrl (struct clk *clk,int enable) {return s5p_gatectrl (S5P_CLKSRC_MASK_FSYS , clk, enable); } -static int s5pv310_clksrc_mask_peril0_ctrl (struct clk *clk,int enable) +static int exynos4_clksrc_mask_peril0_ctrl (struct clk *clk,int enable) {return s5p_gatectrl (S5P_CLKSRC_MASK_PERIL0 , clk, enable); } -static int s5pv310_clksrc_mask_peril1_ctrl (struct clk *clk,int enable) +static int exynos4_clksrc_mask_peril1_ctrl (struct clk *clk,int enable) {return s5p_gatectrl (S5P_CLKSRC_MASK_PERIL1 , clk, enable); } -static int s5pv310_clk_ip_cam_ctrl (struct clk *clk,int enable) +static int exynos4_clk_ip_cam_ctrl (struct clk *clk,int enable) {return s5p_gatectrl (S5P_CLKGATE_IP_CAM , clk, enable); } -static int s5pv310_clk_ip_image_ctrl (struct clk *clk,int enable) +static int exynos4_clk_ip_image_ctrl (struct clk *clk,int enable) {return s5p_gatectrl (S5P_CLKGATE_IP_IMAGE , clk, enable); } -static int s5pv310_clk_ip_lcd0_ctrl (struct clk *clk,int enable) +static int exynos4_clk_ip_lcd0_ctrl (struct clk *clk,int enable) {return s5p_gatectrl (S5P_CLKGATE_IP_LCD0 , clk, enable); } -static int s5pv310_clk_ip_lcd1_ctrl (struct clk *clk,int enable) +static int exynos4_clk_ip_lcd1_ctrl (struct clk *clk,int enable) {return s5p_gatectrl (S5P_CLKGATE_IP_LCD1 , clk, enable); } -static int s5pv310_clk_ip_fsys_ctrl (struct clk *clk,int enable) +static int exynos4_clk_ip_fsys_ctrl (struct clk *clk,int enable) {return s5p_gatectrl (S5P_CLKGATE_IP_FSYS , clk, enable); } -static int s5pv310_clk_ip_peril_ctrl (struct clk *clk,int enable) +static int exynos4_clk_ip_peril_ctrl (struct clk *clk,int enable) {return s5p_gatectrl (S5P_CLKGATE_IP_PERIL , clk, enable); } -static int s5pv310_clk_ip_perir_ctrl (struct clk *clk,int enable) +static int exynos4_clk_ip_perir_ctrl (struct clk *clk,int enable) {return s5p_gatectrl (S5P_CLKGATE_IP_PERIR , clk, enable); }
@@ -358,7 +358,7 @@ static struct clksrc_clk clk_vpllsrc = { .clk = { .name = "vpll_src", .id = -1, - .enable = s5pv310_clksrc_mask_top_ctrl, + .enable = exynos4_clksrc_mask_top_ctrl, .ctrlbit = (1 << 0), }, .sources = &clkset_vpllsrc,
@@ -389,205 +389,205 @@ static struct clk init_clocks_off[] = { .name = "timers", .id = -1, .parent = &clk_aclk_100.clk, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1<<24), }, { .name = "csis", .id = 0, - .enable = s5pv310_clk_ip_cam_ctrl, + .enable = exynos4_clk_ip_cam_ctrl, .ctrlbit = (1 << 4), }, { .name = "csis", .id = 1, - .enable = s5pv310_clk_ip_cam_ctrl, + .enable = exynos4_clk_ip_cam_ctrl, .ctrlbit = (1 << 5), }, { .name = "fimc", .id = 0, - .enable = s5pv310_clk_ip_cam_ctrl, + .enable = exynos4_clk_ip_cam_ctrl, .ctrlbit = (1 << 0), }, { .name = "fimc", .id = 1, - .enable = s5pv310_clk_ip_cam_ctrl, + .enable = exynos4_clk_ip_cam_ctrl, .ctrlbit = (1 << 1), }, { .name = "fimc", .id = 2, - .enable = s5pv310_clk_ip_cam_ctrl, + .enable = exynos4_clk_ip_cam_ctrl, .ctrlbit = (1 << 2), }, { .name = "fimc", .id = 3, - .enable = s5pv310_clk_ip_cam_ctrl, + .enable = exynos4_clk_ip_cam_ctrl, .ctrlbit = (1 << 3), }, { .name = "fimd", .id = 0, - .enable = s5pv310_clk_ip_lcd0_ctrl, + .enable = exynos4_clk_ip_lcd0_ctrl, .ctrlbit = (1 << 0), }, { .name = "fimd", .id = 1, - .enable = s5pv310_clk_ip_lcd1_ctrl, + .enable = exynos4_clk_ip_lcd1_ctrl, .ctrlbit = (1 << 0), }, { .name = "hsmmc", .id = 0, .parent = &clk_aclk_133.clk, - .enable = s5pv310_clk_ip_fsys_ctrl, + .enable = exynos4_clk_ip_fsys_ctrl, .ctrlbit = (1 << 5), }, { .name = "hsmmc", .id = 1, .parent = &clk_aclk_133.clk, - .enable = s5pv310_clk_ip_fsys_ctrl, + .enable = exynos4_clk_ip_fsys_ctrl, .ctrlbit = (1 << 6), }, { .name = "hsmmc", .id = 2, .parent = &clk_aclk_133.clk, - .enable = s5pv310_clk_ip_fsys_ctrl, + .enable = exynos4_clk_ip_fsys_ctrl, .ctrlbit = (1 << 7), }, { .name = "hsmmc", .id = 3, .parent = &clk_aclk_133.clk, - .enable = s5pv310_clk_ip_fsys_ctrl, + .enable = exynos4_clk_ip_fsys_ctrl, .ctrlbit = (1 << 8), }, { .name = "hsmmc", .id = 4, .parent = &clk_aclk_133.clk, - .enable = s5pv310_clk_ip_fsys_ctrl, + .enable = exynos4_clk_ip_fsys_ctrl, .ctrlbit = (1 << 9), }, { .name = "sata", .id = -1, - .enable = s5pv310_clk_ip_fsys_ctrl, + .enable = exynos4_clk_ip_fsys_ctrl, .ctrlbit = (1 << 10), }, { .name = "pdma", .id = 0, - .enable = s5pv310_clk_ip_fsys_ctrl, + .enable = exynos4_clk_ip_fsys_ctrl, .ctrlbit = (1 << 0), }, { .name = "pdma", .id = 1, - .enable = s5pv310_clk_ip_fsys_ctrl, + .enable = exynos4_clk_ip_fsys_ctrl, .ctrlbit = (1 << 1), }, { .name = "adc", .id = -1, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 15), }, { .name = "rtc", .id = -1, - .enable = s5pv310_clk_ip_perir_ctrl, + .enable = exynos4_clk_ip_perir_ctrl, .ctrlbit = (1 << 15), }, { .name = "watchdog", .id = -1, - .enable = s5pv310_clk_ip_perir_ctrl, + .enable = exynos4_clk_ip_perir_ctrl, .ctrlbit = (1 << 14), }, { .name = "usbhost", .id = -1, - .enable = s5pv310_clk_ip_fsys_ctrl , + .enable = exynos4_clk_ip_fsys_ctrl , .ctrlbit = (1 << 12), }, { .name = "otg", .id = -1, - .enable = s5pv310_clk_ip_fsys_ctrl, + .enable = exynos4_clk_ip_fsys_ctrl, .ctrlbit = (1 << 13), }, { .name = "spi", .id = 0, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 16), }, { .name = "spi", .id = 1, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 17), }, { .name = "spi", .id = 2, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 18), }, { .name = "iis", .id = 0, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 19), }, { .name = "iis", .id = 1, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 20), }, { .name = "iis", .id = 2, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 21), }, { .name = "ac97", .id = -1, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 27), }, { .name = "fimg2d", .id = -1, - .enable = s5pv310_clk_ip_image_ctrl, + .enable = exynos4_clk_ip_image_ctrl, .ctrlbit = (1 << 0), }, { .name = "i2c", .id = 0, .parent = &clk_aclk_100.clk, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 6), }, { .name = "i2c", .id = 1, .parent = &clk_aclk_100.clk, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 7), }, { .name = "i2c", .id = 2, .parent = &clk_aclk_100.clk, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 8), }, { .name = "i2c", .id = 3, .parent = &clk_aclk_100.clk, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 9), }, { .name = "i2c", .id = 4, .parent = &clk_aclk_100.clk, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 10), }, { .name = "i2c", .id = 5, .parent = &clk_aclk_100.clk, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 11), }, { .name = "i2c", .id = 6, .parent = &clk_aclk_100.clk, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 12), }, { .name = "i2c", .id = 7, .parent = &clk_aclk_100.clk, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 13), }, };
@@ -596,32 +596,32 @@ static struct clk init_clocks[] = { { .name = "uart", .id = 0, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 0), }, { .name = "uart", .id = 1, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 1), }, { .name = "uart", .id = 2, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 2), }, { .name = "uart", .id = 3, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 3), }, { .name = "uart", .id = 4, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 4), }, { .name = "uart", .id = 5, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 5), } };
@@ -746,7 +746,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "uclk1", .id = 0, - .enable = s5pv310_clksrc_mask_peril0_ctrl, + .enable = exynos4_clksrc_mask_peril0_ctrl, .ctrlbit = (1 << 0), }, .sources = &clkset_group,
@@ -756,7 +756,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "uclk1", .id = 1, - .enable = s5pv310_clksrc_mask_peril0_ctrl, + .enable = exynos4_clksrc_mask_peril0_ctrl, .ctrlbit = (1 << 4), }, .sources = &clkset_group,
@@ -766,7 +766,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "uclk1", .id = 2, - .enable = s5pv310_clksrc_mask_peril0_ctrl, + .enable = exynos4_clksrc_mask_peril0_ctrl, .ctrlbit = (1 << 8), }, .sources = &clkset_group,
@@ -776,7 +776,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "uclk1", .id = 3, - .enable = s5pv310_clksrc_mask_peril0_ctrl, + .enable = exynos4_clksrc_mask_peril0_ctrl, .ctrlbit = (1 << 12), }, .sources = &clkset_group,
@@ -786,7 +786,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "sclk_pwm", .id = -1, - .enable = s5pv310_clksrc_mask_peril0_ctrl, + .enable = exynos4_clksrc_mask_peril0_ctrl, .ctrlbit = (1 << 24), }, .sources = &clkset_group,
@@ -796,7 +796,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "sclk_csis", .id = 0, - .enable = s5pv310_clksrc_mask_cam_ctrl, + .enable = exynos4_clksrc_mask_cam_ctrl, .ctrlbit = (1 << 24), }, .sources = &clkset_group,
@@ -806,7 +806,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "sclk_csis", .id = 1, - .enable = s5pv310_clksrc_mask_cam_ctrl, + .enable = exynos4_clksrc_mask_cam_ctrl, .ctrlbit = (1 << 28), }, .sources = &clkset_group,
@@ -816,7 +816,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "sclk_cam", .id = 0, - .enable = s5pv310_clksrc_mask_cam_ctrl, + .enable = exynos4_clksrc_mask_cam_ctrl, .ctrlbit = (1 << 16), }, .sources = &clkset_group,
@@ -826,7 +826,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "sclk_cam", .id = 1, - .enable = s5pv310_clksrc_mask_cam_ctrl, + .enable = exynos4_clksrc_mask_cam_ctrl, .ctrlbit = (1 << 20), }, .sources = &clkset_group,
@@ -836,7 +836,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "sclk_fimc", .id = 0, - .enable = s5pv310_clksrc_mask_cam_ctrl, + .enable = exynos4_clksrc_mask_cam_ctrl, .ctrlbit = (1 << 0), }, .sources = &clkset_group,
@@ -846,7 +846,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "sclk_fimc", .id = 1, - .enable = s5pv310_clksrc_mask_cam_ctrl, + .enable = exynos4_clksrc_mask_cam_ctrl, .ctrlbit = (1 << 4), }, .sources = &clkset_group,
@@ -856,7 +856,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "sclk_fimc", .id = 2, - .enable = s5pv310_clksrc_mask_cam_ctrl, + .enable = exynos4_clksrc_mask_cam_ctrl, .ctrlbit = (1 << 8), }, .sources = &clkset_group,
@@ -866,7 +866,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "sclk_fimc", .id = 3, - .enable = s5pv310_clksrc_mask_cam_ctrl, + .enable = exynos4_clksrc_mask_cam_ctrl, .ctrlbit = (1 << 12), }, .sources = &clkset_group,
@@ -876,7 +876,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "sclk_fimd", .id = 0, - .enable = s5pv310_clksrc_mask_lcd0_ctrl, + .enable = exynos4_clksrc_mask_lcd0_ctrl, .ctrlbit = (1 << 0), }, .sources = &clkset_group,
@@ -886,7 +886,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "sclk_fimd", .id = 1, - .enable = s5pv310_clksrc_mask_lcd1_ctrl, + .enable = exynos4_clksrc_mask_lcd1_ctrl, .ctrlbit = (1 << 0), }, .sources = &clkset_group,
@@ -896,7 +896,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "sclk_sata", .id = -1, - .enable = s5pv310_clksrc_mask_fsys_ctrl, + .enable = exynos4_clksrc_mask_fsys_ctrl, .ctrlbit = (1 << 24), }, .sources = &clkset_mout_corebus,
@@ -906,7 +906,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "sclk_spi", .id = 0, - .enable = s5pv310_clksrc_mask_peril1_ctrl, + .enable = exynos4_clksrc_mask_peril1_ctrl, .ctrlbit = (1 << 16), }, .sources = &clkset_group,
@@ -916,7 +916,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "sclk_spi", .id = 1, - .enable = s5pv310_clksrc_mask_peril1_ctrl, + .enable = exynos4_clksrc_mask_peril1_ctrl, .ctrlbit = (1 << 20), }, .sources = &clkset_group,
@@ -926,7 +926,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "sclk_spi", .id = 2, - .enable = s5pv310_clksrc_mask_peril1_ctrl, + .enable = exynos4_clksrc_mask_peril1_ctrl, .ctrlbit = (1 << 24), }, .sources = &clkset_group,
@@ -945,7 +945,7 @@ static struct clksrc_clk clksrcs[] = { .name = "sclk_mmc", .id = 0, .parent = &clk_dout_mmc0.clk, - .enable = s5pv310_clksrc_mask_fsys_ctrl, + .enable = exynos4_clksrc_mask_fsys_ctrl, .ctrlbit = (1 << 0), }, .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 8, .size = 8 },
@@ -954,7 +954,7 @@ static struct clksrc_clk clksrcs[] = { .name = "sclk_mmc", .id = 1, .parent = &clk_dout_mmc1.clk, - .enable = s5pv310_clksrc_mask_fsys_ctrl, + .enable = exynos4_clksrc_mask_fsys_ctrl, .ctrlbit = (1 << 4), }, .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 24, .size = 8 },
@@ -963,7 +963,7 @@ static struct clksrc_clk clksrcs[] = { .name = "sclk_mmc", .id = 2, .parent = &clk_dout_mmc2.clk, - .enable = s5pv310_clksrc_mask_fsys_ctrl, + .enable = exynos4_clksrc_mask_fsys_ctrl, .ctrlbit = (1 << 8), }, .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 8, .size = 8 },
@@ -972,7 +972,7 @@ static struct clksrc_clk clksrcs[] = { .name = "sclk_mmc", .id = 3, .parent = &clk_dout_mmc3.clk, - .enable = s5pv310_clksrc_mask_fsys_ctrl, + .enable = exynos4_clksrc_mask_fsys_ctrl, .ctrlbit = (1 << 12), }, .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 },
@@ -981,7 +981,7 @@ static struct clksrc_clk clksrcs[] = { .name = "sclk_mmc", .id = 4, .parent = &clk_dout_mmc4.clk, - .enable = s5pv310_clksrc_mask_fsys_ctrl, + .enable = exynos4_clksrc_mask_fsys_ctrl, .ctrlbit = (1 << 16), }, .reg_div = { .reg = S5P_CLKDIV_FSYS3, .shift = 8, .size = 8 },
@@ -1022,16 +1022,16 @@ static struct clksrc_clk *sysclks[] = {static int xtal_rate; -static unsigned long s5pv310_fout_apll_get_rate (struct clk *clk) +static unsigned long exynos4_fout_apll_get_rate (struct clk *clk) {return s5p_get_pll45xx (xtal_rate,__raw_readl (S5P_APLL_CON0 ), pll_4508); } -static struct clk_ops s5pv310_fout_apll_ops = { - .get_rate = s5pv310_fout_apll_get_rate, +static struct clk_ops exynos4_fout_apll_ops = { + .get_rate = exynos4_fout_apll_get_rate, }; -void __init_or_cpufreq s5pv310_setup_clocks(void) +void __init_or_cpufreq exynos4_setup_clocks(void) {struct clk *xtal_clk;unsigned long apll;
@@ -1070,12 +1070,12 @@ void __init_or_cpufreq s5pv310_setup_clocks(void) vpll =s5p_get_pll46xx (vpllsrc,__raw_readl (S5P_VPLL_CON0 ),__raw_readl (S5P_VPLL_CON1 ), pll_4650); - clk_fout_apll.ops = &s5pv310_fout_apll_ops; + clk_fout_apll.ops = &exynos4_fout_apll_ops; clk_fout_mpll.rate = mpll; clk_fout_epll.rate = epll; clk_fout_vpll.rate = vpll; -printk (KERN_INFO "S5PV310: PLL settings, A=%ld, M=%ld, E=%ld V=%ld" , +printk (KERN_INFO "EXYNOS4: PLL settings, A=%ld, M=%ld, E=%ld V=%ld" , apll, mpll, epll, vpll); armclk =clk_get_rate (&clk_armclk.clk);
@@ -1086,7 +1086,7 @@ void __init_or_cpufreq s5pv310_setup_clocks(void) aclk_160 =clk_get_rate (&clk_aclk_160.clk); aclk_133 =clk_get_rate (&clk_aclk_133.clk); -printk (KERN_INFO "S5PV310: ARMCLK=%ld, DMC=%ld, ACLK200=%ld\n" +printk (KERN_INFO "EXYNOS4: ARMCLK=%ld, DMC=%ld, ACLK200=%ld\n" "ACLK100=%ld, ACLK160=%ld, ACLK133=%ld\n" , armclk, sclk_dmc, aclk_200, aclk_100, aclk_160, aclk_133);
@@ -1103,7 +1103,7 @@ static struct clk *clks[] __initdata = {/* Nothing here yet */ }; -void __init s5pv310_register_clocks (void ) +void __init exynos4_register_clocks (void ) {int ptr;
arch/arm/mach-exynos4/include/mach/regs-clock.h renamed from arch/arm/mach-s5pv310/include/mach/regs-clock.h +4 -4
@@ -1,9 +1,9 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/regs-clock.h +/* linux/arch/arm/mach-exynos4/include/mach/regs-clock.h * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * -* S5PV310 - Clock register definitions +* EXYNOS4 - Clock register definitions * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
Signature · 1 line
1.7.1
PATCH 3/11 ARM: EXYNOS4: Update IRQ part
In reply to Kukjin KimThis patch updates IRQ part of EXYNOS4 according to the change of ARCH name, EXYNOS4.
Signed-off-by Kukjin Kim <[email protected]>
---
.../include/mach/irqs.h | 8 +-
.../include/mach/regs-irq.h | 8 +-
.../{mach-s5pv310 => mach-exynos4}/irq-combiner.c | 4 +-
arch/arm/{mach-s5pv310 => mach-exynos4}/irq-eint.c | 62 ++++++++++----------
4 files changed, 41 insertions(+), 41 deletions(-)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/irqs.h (96%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/regs-irq.h (66%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/irq-combiner.c (96%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/irq-eint.c (72%)arch/arm/mach-exynos4/include/mach/irqs.h renamed from arch/arm/mach-s5pv310/include/mach/irqs.h +4 -4
@@ -1,9 +1,9 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/irqs.h +/* linux/arch/arm/mach-exynos4/include/mach/irqs.h * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * -* S5PV310 - IRQ definitions +* EXYNOS4 - IRQ definitions * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
arch/arm/mach-exynos4/include/mach/regs-irq.h renamed from arch/arm/mach-s5pv310/include/mach/regs-irq.h +4 -4
@@ -1,9 +1,9 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/regs-irq.h +/* linux/arch/arm/mach-exynos4/include/mach/regs-irq.h * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * -* S5PV310 - IRQ register definitions +* EXYNOS4 - IRQ register definitions * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
arch/arm/mach-exynos4/irq-combiner.c renamed from arch/arm/mach-s5pv310/irq-combiner.c +2 -2
@@ -1,6 +1,6 @@ -/* linux/arch/arm/mach-s5pv310/irq-combiner.c +/* linux/arch/arm/mach-exynos4/irq-combiner.c * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. * http://www.samsung.com * * Based on arch/arm/common/gic.c
arch/arm/mach-exynos4/irq-eint.c renamed from arch/arm/mach-s5pv310/irq-eint.c +31 -31
146 lines not on this page · raw message
Signature · 1 line
1.7.1
PATCH 4/11 ARM: EXYNOS4: Update Timer part
In reply to Kukjin KimThis patch updates Timer part of EXYNOS4 according to the change of ARCH name, EXYNOS4.
Signed-off-by Kukjin Kim <[email protected]>
---
.../include/mach/pwm-clock.h | 8 +-
.../{mach-s5pv310 => mach-exynos4}/localtimer.c | 2 +-
arch/arm/{mach-s5pv310 => mach-exynos4}/time.c | 64 ++++++++++----------
3 files changed, 37 insertions(+), 37 deletions(-)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/include/mach/pwm-clock.h (90%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/localtimer.c (92%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/time.c (78%)arch/arm/mach-exynos4/include/mach/pwm-clock.h renamed from arch/arm/mach-s5pv310/include/mach/pwm-clock.h +4 -4
@@ -1,7 +1,7 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/pwm-clock.h +/* linux/arch/arm/mach-exynos4/include/mach/pwm-clock.h * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics
@@ -10,7 +10,7 @@* * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h * -* S5PV310 - pwm clock and timer support +* EXYNOS4 - pwm clock and timer support * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
arch/arm/mach-exynos4/localtimer.c renamed from arch/arm/mach-s5pv310/localtimer.c +1 -1
@@ -1,4 +1,4 @@ -/* linux/arch/arm/mach-s5pv310/localtimer.c +/* linux/arch/arm/mach-exynos4/localtimer.c * * Cloned from linux/arch/arm/mach-realview/localtimer.c *
arch/arm/mach-exynos4/time.c renamed from arch/arm/mach-s5pv310/time.c +32 -32
162 lines not on this page · raw message
Signature · 1 line
1.7.1
PATCH 5/11 ARM: EXYNOS4: Update device support
In reply to Kukjin KimThis patch updates device support of EXYNOS4 according to the change of ARCH name, EXYNOS4.
Cc Ben Dooks <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
---
.../arm/{mach-s5pv310 => mach-exynos4}/dev-audio.c | 143 ++++++++++----------
arch/arm/{mach-s5pv310 => mach-exynos4}/dev-pd.c | 40 +++---
.../{mach-s5pv310 => mach-exynos4}/dev-sysmmu.c | 78 ++++++-----
.../{mach-s5pv310 => mach-exynos4}/setup-i2c1.c | 4 +-
.../{mach-s5pv310 => mach-exynos4}/setup-i2c2.c | 4 +-
.../{mach-s5pv310 => mach-exynos4}/setup-i2c3.c | 4 +-
.../{mach-s5pv310 => mach-exynos4}/setup-i2c4.c | 4 +-
.../{mach-s5pv310 => mach-exynos4}/setup-i2c5.c | 4 +-
.../{mach-s5pv310 => mach-exynos4}/setup-i2c6.c | 4 +-
.../{mach-s5pv310 => mach-exynos4}/setup-i2c7.c | 4 +-
.../setup-sdhci-gpio.c | 52 ++++----
.../{mach-s5pv310 => mach-exynos4}/setup-sdhci.c | 12 +-
arch/arm/plat-samsung/include/plat/devs.h | 23 ++--
arch/arm/plat-samsung/include/plat/pd.h | 4 +-
arch/arm/plat-samsung/include/plat/sdhci.h | 63 +++++----
15 files changed, 227 insertions(+), 216 deletions(-)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/dev-audio.c (57%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/dev-pd.c (74%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/dev-sysmmu.c (62%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-i2c1.c (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-i2c2.c (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-i2c3.c (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-i2c4.c (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-i2c5.c (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-i2c6.c (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-i2c7.c (85%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-sdhci-gpio.c (69%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/setup-sdhci.c (83%)arch/arm/mach-exynos4/dev-audio.c renamed from arch/arm/mach-s5pv310/dev-audio.c +73 -70
@@ -1,4 +1,7 @@ -/* linux/arch/arm/mach-s5pv310/dev-audio.c +/* linux/arch/arm/mach-exynos4/dev-audio.c +* +* Copyright (c) 2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * * Copyright (c) 2010 Samsung Electronics Co. Ltd * Jaswinder Singh <[email protected]>
@@ -24,18 +27,18 @@ static const char *rclksrc[] = { [1] = "i2sclk", }; -static int s5pv310_cfg_i2s (struct platform_device *pdev) +static int exynos4_cfg_i2s (struct platform_device *pdev) {/* configure GPIO for i2s port */ switch (pdev->id) {case 0 : -s3c_gpio_cfgpin_range (S5PV310_GPZ (0 ),7 ,S3C_GPIO_SFN (2 )); +s3c_gpio_cfgpin_range (EXYNOS4_GPZ (0 ),7 ,S3C_GPIO_SFN (2 ));break ;case 1 : -s3c_gpio_cfgpin_range (S5PV310_GPC0 (0 ),5 ,S3C_GPIO_SFN (2 )); +s3c_gpio_cfgpin_range (EXYNOS4_GPC0 (0 ),5 ,S3C_GPIO_SFN (2 ));break ;case 2 : -s3c_gpio_cfgpin_range (S5PV310_GPC1 (0 ),5 ,S3C_GPIO_SFN (4 )); +s3c_gpio_cfgpin_range (EXYNOS4_GPC1 (0 ),5 ,S3C_GPIO_SFN (4 ));break ;default :printk (KERN_ERR "Invalid Device %d\n" , pdev->id);
@@ -46,7 +49,7 @@ static int s5pv310_cfg_i2s(struct platform_device *pdev) }static struct s3c_audio_pdata i2sv5_pdata = { - .cfg_gpio = s5pv310_cfg_i2s, + .cfg_gpio = exynos4_cfg_i2s, .type = { .i2s = { .quirks =QUIRK_PRI_6CHAN |QUIRK_SEC_DAI
@@ -56,10 +59,10 @@ static struct s3c_audio_pdata i2sv5_pdata = { }, }; -static struct resource s5pv310_i2s0_resource[] = { +static struct resource exynos4_i2s0_resource[] = { [0 ] = { - .start =S5PV310_PA_I2S0 , - .end =S5PV310_PA_I2S0 +0x100 -1 , + .start =EXYNOS4_PA_I2S0 , + .end =EXYNOS4_PA_I2S0 +0x100 -1 , .flags =IORESOURCE_MEM , }, [1 ] = {
@@ -79,11 +82,11 @@ static struct resource s5pv310_i2s0_resource[] = { }, }; -struct platform_device s5pv310_device_i2s0 = { +struct platform_device exynos4_device_i2s0 = { .name ="samsung-i2s" , .id =0 , - .num_resources =ARRAY_SIZE (s5pv310_i2s0_resource), - .resource = s5pv310_i2s0_resource, + .num_resources =ARRAY_SIZE (exynos4_i2s0_resource), + .resource = exynos4_i2s0_resource, .dev = { .platform_data = &i2sv5_pdata, },
@@ -95,7 +98,7 @@ static const char *rclksrc_v3[] = { };static struct s3c_audio_pdata i2sv3_pdata = { - .cfg_gpio = s5pv310_cfg_i2s, + .cfg_gpio = exynos4_cfg_i2s, .type = { .i2s = { .quirks =QUIRK_NO_MUXPSR ,
@@ -104,10 +107,10 @@ static struct s3c_audio_pdata i2sv3_pdata = { }, }; -static struct resource s5pv310_i2s1_resource[] = { +static struct resource exynos4_i2s1_resource[] = { [0 ] = { - .start =S5PV310_PA_I2S1 , - .end =S5PV310_PA_I2S1 +0x100 -1 , + .start =EXYNOS4_PA_I2S1 , + .end =EXYNOS4_PA_I2S1 +0x100 -1 , .flags =IORESOURCE_MEM , }, [1 ] = {
@@ -122,20 +125,20 @@ static struct resource s5pv310_i2s1_resource[] = { }, }; -struct platform_device s5pv310_device_i2s1 = { +struct platform_device exynos4_device_i2s1 = { .name ="samsung-i2s" , .id =1 , - .num_resources =ARRAY_SIZE (s5pv310_i2s1_resource), - .resource = s5pv310_i2s1_resource, + .num_resources =ARRAY_SIZE (exynos4_i2s1_resource), + .resource = exynos4_i2s1_resource, .dev = { .platform_data = &i2sv3_pdata, }, }; -static struct resource s5pv310_i2s2_resource[] = { +static struct resource exynos4_i2s2_resource[] = { [0 ] = { - .start =S5PV310_PA_I2S2 , - .end =S5PV310_PA_I2S2 +0x100 -1 , + .start =EXYNOS4_PA_I2S2 , + .end =EXYNOS4_PA_I2S2 +0x100 -1 , .flags =IORESOURCE_MEM , }, [1 ] = {
@@ -150,11 +153,11 @@ static struct resource s5pv310_i2s2_resource[] = { }, }; -struct platform_device s5pv310_device_i2s2 = { +struct platform_device exynos4_device_i2s2 = { .name ="samsung-i2s" , .id =2 , - .num_resources =ARRAY_SIZE (s5pv310_i2s2_resource), - .resource = s5pv310_i2s2_resource, + .num_resources =ARRAY_SIZE (exynos4_i2s2_resource), + .resource = exynos4_i2s2_resource, .dev = { .platform_data = &i2sv3_pdata, },
@@ -162,17 +165,17 @@ struct platform_device s5pv310_device_i2s2 = {/* PCM Controller platform_devices */ -static int s5pv310_pcm_cfg_gpio (struct platform_device *pdev) +static int exynos4_pcm_cfg_gpio (struct platform_device *pdev) {switch (pdev->id) {case 0 : -s3c_gpio_cfgpin_range (S5PV310_GPZ (0 ),5 ,S3C_GPIO_SFN (3 )); +s3c_gpio_cfgpin_range (EXYNOS4_GPZ (0 ),5 ,S3C_GPIO_SFN (3 ));break ;case 1 : -s3c_gpio_cfgpin_range (S5PV310_GPC0 (0 ),5 ,S3C_GPIO_SFN (3 )); +s3c_gpio_cfgpin_range (EXYNOS4_GPC0 (0 ),5 ,S3C_GPIO_SFN (3 ));break ;case 2 : -s3c_gpio_cfgpin_range (S5PV310_GPC1 (0 ),5 ,S3C_GPIO_SFN (3 )); +s3c_gpio_cfgpin_range (EXYNOS4_GPC1 (0 ),5 ,S3C_GPIO_SFN (3 ));break ;default :printk (KERN_DEBUG "Invalid PCM Controller number!" );
@@ -183,13 +186,13 @@ static int s5pv310_pcm_cfg_gpio(struct platform_device *pdev) }static struct s3c_audio_pdata s3c_pcm_pdata = { - .cfg_gpio = s5pv310_pcm_cfg_gpio, + .cfg_gpio = exynos4_pcm_cfg_gpio, }; -static struct resource s5pv310_pcm0_resource[] = { +static struct resource exynos4_pcm0_resource[] = { [0 ] = { - .start =S5PV310_PA_PCM0 , - .end =S5PV310_PA_PCM0 +0x100 -1 , + .start =EXYNOS4_PA_PCM0 , + .end =EXYNOS4_PA_PCM0 +0x100 -1 , .flags =IORESOURCE_MEM , }, [1 ] = {
@@ -204,20 +207,20 @@ static struct resource s5pv310_pcm0_resource[] = { }, }; -struct platform_device s5pv310_device_pcm0 = { +struct platform_device exynos4_device_pcm0 = { .name ="samsung-pcm" , .id =0 , - .num_resources =ARRAY_SIZE (s5pv310_pcm0_resource), - .resource = s5pv310_pcm0_resource, + .num_resources =ARRAY_SIZE (exynos4_pcm0_resource), + .resource = exynos4_pcm0_resource, .dev = { .platform_data = &s3c_pcm_pdata, }, }; -static struct resource s5pv310_pcm1_resource[] = { +static struct resource exynos4_pcm1_resource[] = { [0 ] = { - .start =S5PV310_PA_PCM1 , - .end =S5PV310_PA_PCM1 +0x100 -1 , + .start =EXYNOS4_PA_PCM1 , + .end =EXYNOS4_PA_PCM1 +0x100 -1 , .flags =IORESOURCE_MEM , }, [1 ] = {
@@ -232,20 +235,20 @@ static struct resource s5pv310_pcm1_resource[] = { }, }; -struct platform_device s5pv310_device_pcm1 = { +struct platform_device exynos4_device_pcm1 = { .name ="samsung-pcm" , .id =1 , - .num_resources =ARRAY_SIZE (s5pv310_pcm1_resource), - .resource = s5pv310_pcm1_resource, + .num_resources =ARRAY_SIZE (exynos4_pcm1_resource), + .resource = exynos4_pcm1_resource, .dev = { .platform_data = &s3c_pcm_pdata, }, }; -static struct resource s5pv310_pcm2_resource[] = { +static struct resource exynos4_pcm2_resource[] = { [0 ] = { - .start =S5PV310_PA_PCM2 , - .end =S5PV310_PA_PCM2 +0x100 -1 , + .start =EXYNOS4_PA_PCM2 , + .end =EXYNOS4_PA_PCM2 +0x100 -1 , .flags =IORESOURCE_MEM , }, [1 ] = {
@@ -260,11 +263,11 @@ static struct resource s5pv310_pcm2_resource[] = { }, }; -struct platform_device s5pv310_device_pcm2 = { +struct platform_device exynos4_device_pcm2 = { .name ="samsung-pcm" , .id =2 , - .num_resources =ARRAY_SIZE (s5pv310_pcm2_resource), - .resource = s5pv310_pcm2_resource, + .num_resources =ARRAY_SIZE (exynos4_pcm2_resource), + .resource = exynos4_pcm2_resource, .dev = { .platform_data = &s3c_pcm_pdata, },
@@ -272,15 +275,15 @@ struct platform_device s5pv310_device_pcm2 = {/* AC97 Controller platform devices */ -static int s5pv310_ac97_cfg_gpio (struct platform_device *pdev) +static int exynos4_ac97_cfg_gpio (struct platform_device *pdev) { -return s3c_gpio_cfgpin_range (S5PV310_GPC0 (0 ),5 ,S3C_GPIO_SFN (4 )); +return s3c_gpio_cfgpin_range (EXYNOS4_GPC0 (0 ),5 ,S3C_GPIO_SFN (4 )); } -static struct resource s5pv310_ac97_resource[] = { +static struct resource exynos4_ac97_resource[] = { [0 ] = { - .start =S5PV310_PA_AC97 , - .end =S5PV310_PA_AC97 +0x100 -1 , + .start =EXYNOS4_PA_AC97 , + .end =EXYNOS4_PA_AC97 +0x100 -1 , .flags =IORESOURCE_MEM , }, [1 ] = {
@@ -306,36 +309,36 @@ static struct resource s5pv310_ac97_resource[] = { };static struct s3c_audio_pdata s3c_ac97_pdata = { - .cfg_gpio = s5pv310_ac97_cfg_gpio, + .cfg_gpio = exynos4_ac97_cfg_gpio, }; -static u64 s5pv310_ac97_dmamask =DMA_BIT_MASK (32 ); +static u64 exynos4_ac97_dmamask =DMA_BIT_MASK (32 ); -struct platform_device s5pv310_device_ac97 = { +struct platform_device exynos4_device_ac97 = { .name ="samsung-ac97" , .id =-1 , - .num_resources =ARRAY_SIZE (s5pv310_ac97_resource), - .resource = s5pv310_ac97_resource, + .num_resources =ARRAY_SIZE (exynos4_ac97_resource), + .resource = exynos4_ac97_resource, .dev = { .platform_data = &s3c_ac97_pdata, - .dma_mask = &s5pv310_ac97_dmamask, + .dma_mask = &exynos4_ac97_dmamask, .coherent_dma_mask =DMA_BIT_MASK (32 ), }, };/* S/PDIF Controller platform_device */ -static int s5pv310_spdif_cfg_gpio (struct platform_device *pdev) +static int exynos4_spdif_cfg_gpio (struct platform_device *pdev) { -s3c_gpio_cfgpin_range (S5PV310_GPC1 (0 ),2 ,S3C_GPIO_SFN (3 )); +s3c_gpio_cfgpin_range (EXYNOS4_GPC1 (0 ),2 ,S3C_GPIO_SFN (3 ));return 0 ; } -static struct resource s5pv310_spdif_resource[] = { +static struct resource exynos4_spdif_resource[] = { [0 ] = { - .start =S5PV310_PA_SPDIF , - .end =S5PV310_PA_SPDIF +0x100 -1 , + .start =EXYNOS4_PA_SPDIF , + .end =EXYNOS4_PA_SPDIF +0x100 -1 , .flags =IORESOURCE_MEM , }, [1 ] = {
@@ -346,19 +349,19 @@ static struct resource s5pv310_spdif_resource[] = { };static struct s3c_audio_pdata samsung_spdif_pdata = { - .cfg_gpio = s5pv310_spdif_cfg_gpio, + .cfg_gpio = exynos4_spdif_cfg_gpio, }; -static u64 s5pv310_spdif_dmamask =DMA_BIT_MASK (32 ); +static u64 exynos4_spdif_dmamask =DMA_BIT_MASK (32 ); -struct platform_device s5pv310_device_spdif = { +struct platform_device exynos4_device_spdif = { .name ="samsung-spdif" , .id =-1 , - .num_resources =ARRAY_SIZE (s5pv310_spdif_resource), - .resource = s5pv310_spdif_resource, + .num_resources =ARRAY_SIZE (exynos4_spdif_resource), + .resource = exynos4_spdif_resource, .dev = { .platform_data = &samsung_spdif_pdata, - .dma_mask = &s5pv310_spdif_dmamask, + .dma_mask = &exynos4_spdif_dmamask, .coherent_dma_mask =DMA_BIT_MASK (32 ), }, };
arch/arm/mach-exynos4/dev-pd.c renamed from arch/arm/mach-s5pv310/dev-pd.c +20 -20
@@ -1,9 +1,9 @@ -/* linux/arch/arm/mach-s5pv310/dev-pd.c +/* linux/arch/arm/mach-exynos4/dev-pd.c * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. * http://www.samsung.com * -* S5PV310 - Power Domain support +* EXYNOS4 - Power Domain support * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
@@ -19,7 +19,7 @@#include <plat/pd.h> -static int s5pv310_pd_enable (struct device *dev) +static int exynos4_pd_enable (struct device *dev) {struct samsung_pd_info *pdata = dev->platform_data;u32 timeout;
@@ -42,7 +42,7 @@ static int s5pv310_pd_enable(struct device *dev)return 0 ; } -static int s5pv310_pd_disable (struct device *dev) +static int exynos4_pd_disable (struct device *dev) {struct samsung_pd_info *pdata = dev->platform_data;u32 timeout;
@@ -64,14 +64,14 @@ static int s5pv310_pd_disable(struct device *dev)return 0 ; } -struct platform_device s5pv310_device_pd[] = { +struct platform_device exynos4_device_pd[] = { { .name ="samsung-pd" , .id =0 , .dev = { .platform_data = &(struct samsung_pd_info ) { - .enable = s5pv310_pd_enable, - .disable = s5pv310_pd_disable, + .enable = exynos4_pd_enable, + .disable = exynos4_pd_disable, .base =S5P_PMU_MFC_CONF , }, },
@@ -80,8 +80,8 @@ struct platform_device s5pv310_device_pd[] = { .id = 1, .dev = { .platform_data = &(struct samsung_pd_info ) { - .enable = s5pv310_pd_enable, - .disable = s5pv310_pd_disable, + .enable = exynos4_pd_enable, + .disable = exynos4_pd_disable, .base =S5P_PMU_G3D_CONF , }, },
@@ -90,8 +90,8 @@ struct platform_device s5pv310_device_pd[] = { .id = 2, .dev = { .platform_data = &(struct samsung_pd_info ) { - .enable = s5pv310_pd_enable, - .disable = s5pv310_pd_disable, + .enable = exynos4_pd_enable, + .disable = exynos4_pd_disable, .base =S5P_PMU_LCD0_CONF , }, },
@@ -100,8 +100,8 @@ struct platform_device s5pv310_device_pd[] = { .id = 3, .dev = { .platform_data = &(struct samsung_pd_info ) { - .enable = s5pv310_pd_enable, - .disable = s5pv310_pd_disable, + .enable = exynos4_pd_enable, + .disable = exynos4_pd_disable, .base =S5P_PMU_LCD1_CONF , }, },
@@ -110,8 +110,8 @@ struct platform_device s5pv310_device_pd[] = { .id = 4, .dev = { .platform_data = &(struct samsung_pd_info ) { - .enable = s5pv310_pd_enable, - .disable = s5pv310_pd_disable, + .enable = exynos4_pd_enable, + .disable = exynos4_pd_disable, .base =S5P_PMU_TV_CONF , }, },
@@ -120,8 +120,8 @@ struct platform_device s5pv310_device_pd[] = { .id = 5, .dev = { .platform_data = &(struct samsung_pd_info ) { - .enable = s5pv310_pd_enable, - .disable = s5pv310_pd_disable, + .enable = exynos4_pd_enable, + .disable = exynos4_pd_disable, .base =S5P_PMU_CAM_CONF , }, },
@@ -130,8 +130,8 @@ struct platform_device s5pv310_device_pd[] = { .id = 6, .dev = { .platform_data = &(struct samsung_pd_info ) { - .enable = s5pv310_pd_enable, - .disable = s5pv310_pd_disable, + .enable = exynos4_pd_enable, + .disable = exynos4_pd_disable, .base =S5P_PMU_GPS_CONF , }, },
arch/arm/mach-exynos4/dev-sysmmu.c renamed from arch/arm/mach-s5pv310/dev-sysmmu.c +40 -38
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arch/arm/mach-exynos4/setup-i2c1.c renamed from arch/arm/mach-s5pv310/setup-i2c1.c +2 -2
@@ -1,5 +1,5 @@/* -* linux/arch/arm/mach-s5pv310/setup-i2c1.c +* linux/arch/arm/mach-exynos4/setup-i2c1.c * * Copyright (C) 2010 Samsung Electronics Co., Ltd. *
@@ -18,6 +18,6 @@ struct platform_device; /* don't need the contents */void s3c_i2c1_cfg_gpio (struct platform_device *dev) { -s3c_gpio_cfgall_range (S5PV310_GPD1 (2 ),2 , +s3c_gpio_cfgall_range (EXYNOS4_GPD1 (2 ),2 ,S3C_GPIO_SFN (2 ),S3C_GPIO_PULL_UP ); }
arch/arm/mach-exynos4/setup-i2c2.c renamed from arch/arm/mach-s5pv310/setup-i2c2.c +2 -2
@@ -1,5 +1,5 @@/* -* linux/arch/arm/mach-s5pv310/setup-i2c2.c +* linux/arch/arm/mach-exynos4/setup-i2c2.c * * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. *
@@ -18,6 +18,6 @@ struct platform_device; /* don't need the contents */void s3c_i2c2_cfg_gpio (struct platform_device *dev) { -s3c_gpio_cfgall_range (S5PV310_GPA0 (6 ),2 , +s3c_gpio_cfgall_range (EXYNOS4_GPA0 (6 ),2 ,S3C_GPIO_SFN (3 ),S3C_GPIO_PULL_UP ); }
arch/arm/mach-exynos4/setup-i2c3.c renamed from arch/arm/mach-s5pv310/setup-i2c3.c +2 -2
@@ -1,5 +1,5 @@/* -* linux/arch/arm/mach-s5pv310/setup-i2c3.c +* linux/arch/arm/mach-exynos4/setup-i2c3.c * * Copyright (c) 2010 Samsung Electronics Co., Ltd. *
@@ -18,6 +18,6 @@ struct platform_device; /* don't need the contents */void s3c_i2c3_cfg_gpio (struct platform_device *dev) { -s3c_gpio_cfgall_range (S5PV310_GPA1 (2 ),2 , +s3c_gpio_cfgall_range (EXYNOS4_GPA1 (2 ),2 ,S3C_GPIO_SFN (3 ),S3C_GPIO_PULL_UP ); }
arch/arm/mach-exynos4/setup-i2c4.c renamed from arch/arm/mach-s5pv310/setup-i2c4.c +2 -2
@@ -1,5 +1,5 @@/* -* linux/arch/arm/mach-s5pv310/setup-i2c4.c +* linux/arch/arm/mach-exynos4/setup-i2c4.c * * Copyright (c) 2010 Samsung Electronics Co., Ltd. *
@@ -18,6 +18,6 @@ struct platform_device; /* don't need the contents */void s3c_i2c4_cfg_gpio (struct platform_device *dev) { -s3c_gpio_cfgall_range (S5PV310_GPB (2 ),2 , +s3c_gpio_cfgall_range (EXYNOS4_GPB (2 ),2 ,S3C_GPIO_SFN (3 ),S3C_GPIO_PULL_UP ); }
arch/arm/mach-exynos4/setup-i2c5.c renamed from arch/arm/mach-s5pv310/setup-i2c5.c +2 -2
@@ -1,5 +1,5 @@/* -* linux/arch/arm/mach-s5pv310/setup-i2c5.c +* linux/arch/arm/mach-exynos4/setup-i2c5.c * * Copyright (c) 2010 Samsung Electronics Co., Ltd. *
@@ -18,6 +18,6 @@ struct platform_device; /* don't need the contents */void s3c_i2c5_cfg_gpio (struct platform_device *dev) { -s3c_gpio_cfgall_range (S5PV310_GPB (6 ),2 , +s3c_gpio_cfgall_range (EXYNOS4_GPB (6 ),2 ,S3C_GPIO_SFN (3 ),S3C_GPIO_PULL_UP ); }
arch/arm/mach-exynos4/setup-i2c6.c renamed from arch/arm/mach-s5pv310/setup-i2c6.c +2 -2
@@ -1,5 +1,5 @@/* -* linux/arch/arm/mach-s5pv310/setup-i2c6.c +* linux/arch/arm/mach-exynos4/setup-i2c6.c * * Copyright (c) 2010 Samsung Electronics Co., Ltd. *
@@ -18,6 +18,6 @@ struct platform_device; /* don't need the contents */void s3c_i2c6_cfg_gpio (struct platform_device *dev) { -s3c_gpio_cfgall_range (S5PV310_GPC1 (3 ),2 , +s3c_gpio_cfgall_range (EXYNOS4_GPC1 (3 ),2 ,S3C_GPIO_SFN (4 ),S3C_GPIO_PULL_UP ); }
arch/arm/mach-exynos4/setup-i2c7.c renamed from arch/arm/mach-s5pv310/setup-i2c7.c +2 -2
@@ -1,5 +1,5 @@/* -* linux/arch/arm/mach-s5pv310/setup-i2c7.c +* linux/arch/arm/mach-exynos4/setup-i2c7.c * * Copyright (c) 2010 Samsung Electronics Co., Ltd. *
@@ -18,6 +18,6 @@ struct platform_device; /* don't need the contents */void s3c_i2c7_cfg_gpio (struct platform_device *dev) { -s3c_gpio_cfgall_range (S5PV310_GPD0 (2 ),2 , +s3c_gpio_cfgall_range (EXYNOS4_GPD0 (2 ),2 ,S3C_GPIO_SFN (3 ),S3C_GPIO_PULL_UP ); }
arch/arm/mach-exynos4/setup-sdhci-gpio.c renamed from arch/arm/mach-s5pv310/setup-sdhci-gpio.c +26 -26
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arch/arm/mach-exynos4/setup-sdhci.c renamed from arch/arm/mach-s5pv310/setup-sdhci.c +6 -6
@@ -1,9 +1,9 @@ -/* linux/arch/arm/mach-s5pv310/setup-sdhci.c +/* linux/arch/arm/mach-exynos4/setup-sdhci.c * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * -* S5PV310 - Helper functions for settign up SDHCI device(s) (HSMMC) +* EXYNOS4 - Helper functions for settign up SDHCI device(s) (HSMMC) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
@@ -23,14 +23,14 @@/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ -char *s5pv310_hsmmc_clksrcs[4 ] = { +char *exynos4_hsmmc_clksrcs[4 ] = { [0 ] =NULL , [1 ] =NULL , [2 ] ="sclk_mmc" ,/* mmc_bus */ [3 ] =NULL , }; -void s5pv310_setup_sdhci_cfg_card (struct platform_device *dev,void __iomem *r, +void exynos4_setup_sdhci_cfg_card (struct platform_device *dev,void __iomem *r,struct mmc_ios *ios,struct mmc_card *card) {u32 ctrl2, ctrl3;
arch/arm/plat-samsung/include/plat/devs.h +13 -10
@@ -1,5 +1,8 @@/* arch/arm/plat-samsung/include/plat/devs.h * +* Copyright (c) 2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com +* * Copyright (c) 2004 Simtec Electronics * Ben Dooks <[email protected]> *
@@ -96,15 +99,15 @@ extern struct platform_device s5pv210_device_iis1;extern struct platform_device s5pv210_device_iis2;extern struct platform_device s5pv210_device_spdif; -extern struct platform_device s5pv310_device_ac97; -extern struct platform_device s5pv310_device_pcm0; -extern struct platform_device s5pv310_device_pcm1; -extern struct platform_device s5pv310_device_pcm2; -extern struct platform_device s5pv310_device_i2s0; -extern struct platform_device s5pv310_device_i2s1; -extern struct platform_device s5pv310_device_i2s2; -extern struct platform_device s5pv310_device_spdif; -extern struct platform_device s5pv310_device_pd[]; +extern struct platform_device exynos4_device_ac97; +extern struct platform_device exynos4_device_pcm0; +extern struct platform_device exynos4_device_pcm1; +extern struct platform_device exynos4_device_pcm2; +extern struct platform_device exynos4_device_i2s0; +extern struct platform_device exynos4_device_i2s1; +extern struct platform_device exynos4_device_i2s2; +extern struct platform_device exynos4_device_spdif; +extern struct platform_device exynos4_device_pd[];extern struct platform_device s5p6442_device_pcm0;extern struct platform_device s5p6442_device_pcm1;
@@ -137,7 +140,7 @@ extern struct platform_device s5p_device_fimc2;extern struct platform_device s5p_device_mipi_csis0;extern struct platform_device s5p_device_mipi_csis1; -extern struct platform_device s5pv310_device_sysmmu; +extern struct platform_device exynos4_device_sysmmu;/* s3c2440 specific devices */
arch/arm/plat-samsung/include/plat/pd.h +2 -2
@@ -1,6 +1,6 @@/* linux/arch/arm/plat-samsung/include/plat/pd.h * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. * http://www.samsung.com * * This program is free software; you can redistribute it and/or modify
@@ -17,7 +17,7 @@ struct samsung_pd_info {void __iomem *base; }; -enum s5pv310_pd_block { +enum exynos4_pd_block {PD_MFC ,PD_G3D ,PD_LCD0 ,
arch/arm/plat-samsung/include/plat/sdhci.h +33 -30
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Signature · 1 line
1.7.1
PATCH 6/11 ARM: EXYNOS4: Moved board support files
In reply to Kukjin KimThis patch moves board support files, SMDKC210, SMKDV310 and UNIVERSAL_C210 into arch/arm/mach-exynos4/ according to the change of ARCH name, EXYNOS4.
Cc Kyungmin Park <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
---
.../{mach-s5pv310 => mach-exynos4}/mach-smdkc210.c | 48 ++++++++++----------
.../{mach-s5pv310 => mach-exynos4}/mach-smdkv310.c | 48 ++++++++++----------
.../mach-universal_c210.c | 22 +++++-----
3 files changed, 59 insertions(+), 59 deletions(-)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/mach-smdkc210.c (87%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/mach-smdkv310.c (87%)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/mach-universal_c210.c (93%)arch/arm/mach-exynos4/mach-smdkc210.c renamed from arch/arm/mach-s5pv310/mach-smdkc210.c +24 -24
@@ -1,7 +1,7 @@ -/* linux/arch/arm/mach-s5pv310/mach-smdkc210.c +/* linux/arch/arm/mach-exynos4/mach-smdkc210.c * -* Copyright (c) 2010 Samsung Electronics Co., Ltd. -* http://www.samsung.com/ +* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +* http://www.samsung.com * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as
@@ -21,7 +21,7 @@#include <plat/regs-serial.h> #include <plat/regs-srom.h> -#include <plat/s5pv310.h> +#include <plat/exynos4.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/sdhci.h>
@@ -77,10 +77,10 @@ static struct s3c2410_uartcfg smdkc210_uartcfgs[] __initdata = {static struct s3c_sdhci_platdata smdkc210_hsmmc0_pdata__initdata = { .cd_type =S3C_SDHCI_CD_GPIO , - .ext_cd_gpio =S5PV310_GPK0 (2 ), + .ext_cd_gpio =EXYNOS4_GPK0 (2 ), .ext_cd_gpio_invert =1 , .clk_type =S3C_SDHCI_CLK_DIV_EXTERNAL , -#ifdef CONFIG_S5PV310_SDHCI_CH0_8BIT +#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT .max_width =8 , .host_caps =MMC_CAP_8_BIT_DATA , #endif
@@ -88,17 +88,17 @@ static struct s3c_sdhci_platdata smdkc210_hsmmc0_pdata __initdata = {static struct s3c_sdhci_platdata smdkc210_hsmmc1_pdata__initdata = { .cd_type =S3C_SDHCI_CD_GPIO , - .ext_cd_gpio =S5PV310_GPK0 (2 ), + .ext_cd_gpio =EXYNOS4_GPK0 (2 ), .ext_cd_gpio_invert =1 , .clk_type =S3C_SDHCI_CLK_DIV_EXTERNAL , };static struct s3c_sdhci_platdata smdkc210_hsmmc2_pdata__initdata = { .cd_type =S3C_SDHCI_CD_GPIO , - .ext_cd_gpio =S5PV310_GPK2 (2 ), + .ext_cd_gpio =EXYNOS4_GPK2 (2 ), .ext_cd_gpio_invert =1 , .clk_type =S3C_SDHCI_CLK_DIV_EXTERNAL , -#ifdef CONFIG_S5PV310_SDHCI_CH2_8BIT +#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT .max_width =8 , .host_caps =MMC_CAP_8_BIT_DATA , #endif
@@ -106,15 +106,15 @@ static struct s3c_sdhci_platdata smdkc210_hsmmc2_pdata __initdata = {static struct s3c_sdhci_platdata smdkc210_hsmmc3_pdata__initdata = { .cd_type =S3C_SDHCI_CD_GPIO , - .ext_cd_gpio =S5PV310_GPK2 (2 ), + .ext_cd_gpio =EXYNOS4_GPK2 (2 ), .ext_cd_gpio_invert =1 , .clk_type =S3C_SDHCI_CLK_DIV_EXTERNAL , };static struct resource smdkc210_smsc911x_resources[] = { [0 ] = { - .start =S5PV310_PA_SROM_BANK (1 ), - .end =S5PV310_PA_SROM_BANK (1 ) +SZ_64K -1 , + .start =EXYNOS4_PA_SROM_BANK (1 ), + .end =EXYNOS4_PA_SROM_BANK (1 ) +SZ_64K -1 , .flags =IORESOURCE_MEM , }, [1 ] = {
@@ -154,16 +154,16 @@ static struct platform_device *smdkc210_devices[] __initdata = { &s3c_device_i2c1, &s3c_device_rtc, &s3c_device_wdt, - &s5pv310_device_ac97, - &s5pv310_device_i2s0, - &s5pv310_device_pd[PD_MFC ], - &s5pv310_device_pd[PD_G3D ], - &s5pv310_device_pd[PD_LCD0 ], - &s5pv310_device_pd[PD_LCD1 ], - &s5pv310_device_pd[PD_CAM ], - &s5pv310_device_pd[PD_TV ], - &s5pv310_device_pd[PD_GPS ], - &s5pv310_device_sysmmu, + &exynos4_device_ac97, + &exynos4_device_i2s0, + &exynos4_device_pd[PD_MFC ], + &exynos4_device_pd[PD_G3D ], + &exynos4_device_pd[PD_LCD0 ], + &exynos4_device_pd[PD_LCD1 ], + &exynos4_device_pd[PD_CAM ], + &exynos4_device_pd[PD_TV ], + &exynos4_device_pd[PD_GPS ], + &exynos4_device_sysmmu, &samsung_asoc_dma, &smdkc210_smsc911x, };
@@ -216,8 +216,8 @@ static void __init smdkc210_machine_init(void)MACHINE_START (SMDKC210 ,"SMDKC210" )/* Maintainer: Kukjin Kim <[email protected]> */ .boot_params = S5P_PA_SDRAM + 0x100, - .init_irq = s5pv310_init_irq, + .init_irq = exynos4_init_irq, .map_io = smdkc210_map_io, .init_machine = smdkc210_machine_init, - .timer = &s5pv310_timer, + .timer = &exynos4_timer,MACHINE_END
arch/arm/mach-exynos4/mach-smdkv310.c renamed from arch/arm/mach-s5pv310/mach-smdkv310.c +24 -24
104 lines not on this page · raw message
arch/arm/mach-exynos4/mach-universal_c210.c renamed from arch/arm/mach-s5pv310/mach-universal_c210.c +11 -11
@@ -1,4 +1,4 @@ -/* linux/arch/arm/mach-s5pv310/mach-universal_c210.c +/* linux/arch/arm/mach-exynos4/mach-universal_c210.c * * Copyright (c) 2010 Samsung Electronics Co., Ltd. *
@@ -21,7 +21,7 @@#include <asm/mach-types.h> #include <plat/regs-serial.h> -#include <plat/s5pv310.h> +#include <plat/exynos4.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/sdhci.h>
@@ -72,35 +72,35 @@ static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {static struct gpio_keys_button universal_gpio_keys_tables[] = { { .code =KEY_VOLUMEUP , - .gpio =S5PV310_GPX2 (0 ),/* XEINT16 */ + .gpio =EXYNOS4_GPX2 (0 ),/* XEINT16 */ .desc ="gpio-keys: KEY_VOLUMEUP" , .type =EV_KEY , .active_low =1 , .debounce_interval =1 , }, { .code =KEY_VOLUMEDOWN , - .gpio =S5PV310_GPX2 (1 ),/* XEINT17 */ + .gpio =EXYNOS4_GPX2 (1 ),/* XEINT17 */ .desc ="gpio-keys: KEY_VOLUMEDOWN" , .type =EV_KEY , .active_low =1 , .debounce_interval =1 , }, { .code =KEY_CONFIG , - .gpio =S5PV310_GPX2 (2 ),/* XEINT18 */ + .gpio =EXYNOS4_GPX2 (2 ),/* XEINT18 */ .desc ="gpio-keys: KEY_CONFIG" , .type =EV_KEY , .active_low =1 , .debounce_interval =1 , }, { .code =KEY_CAMERA , - .gpio =S5PV310_GPX2 (3 ),/* XEINT19 */ + .gpio =EXYNOS4_GPX2 (3 ),/* XEINT19 */ .desc ="gpio-keys: KEY_CAMERA" , .type =EV_KEY , .active_low =1 , .debounce_interval =1 , }, { .code =KEY_OK , - .gpio =S5PV310_GPX3 (5 ),/* XEINT29 */ + .gpio =EXYNOS4_GPX3 (5 ),/* XEINT29 */ .desc ="gpio-keys: KEY_OK" , .type =EV_KEY , .active_low =1 ,
@@ -146,7 +146,7 @@ static struct regulator_init_data mmc0_fixed_voltage_init_data = {static struct fixed_voltage_config mmc0_fixed_voltage_config = { .supply_name ="MASSMEMORY_EN" , .microvolts =2800000 , - .gpio =S5PV310_GPE1 (3 ), + .gpio =EXYNOS4_GPE1 (3 ), .enable_high = true, .init_data = &mmc0_fixed_voltage_init_data, };
@@ -165,7 +165,7 @@ static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = { .host_caps = MMC_CAP_4_BIT_DATA |MMC_CAP_MMC_HIGHSPEED |MMC_CAP_SD_HIGHSPEED | MMC_CAP_DISABLE, - .ext_cd_gpio = S5PV310_GPX3(4), /* XEINT_28 */ + .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */ .ext_cd_gpio_invert = 1, .cd_type = S3C_SDHCI_CD_GPIO, .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
@@ -230,8 +230,8 @@ static void __init universal_machine_init(void)MACHINE_START (UNIVERSAL_C210 ,"UNIVERSAL_C210" )/* Maintainer: Kyungmin Park <[email protected]> */ .boot_params = S5P_PA_SDRAM + 0x100, - .init_irq = s5pv310_init_irq, + .init_irq = exynos4_init_irq, .map_io = universal_map_io, .init_machine = universal_machine_init, - .timer = &s5pv310_timer, + .timer = &exynos4_timer,MACHINE_END
Signature · 1 line
1.7.1
PATCH 7/11 ARM: EXYNOS4: Update Kconfig and Makefile for the new ARCH_EXYNOS4
In reply to Kukjin KimThis patch changes the Kconfig and Makefile for the new ARCH_EXYNOS4. It also updates arch/arm/Kconfig, Makeifile and arch/arm/mm/Kconfig to include support for the new ARCH_EXYNOS4.
Cc Russell King <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
---
arch/arm/Kconfig | 12 +-
arch/arm/Makefile | 2 +-
arch/arm/{mach-s5pv310 => mach-exynos4}/Kconfig | 105 +++++++++----------
arch/arm/mach-exynos4/Makefile | 43 ++++++++
.../{mach-s5pv310 => mach-exynos4}/Makefile.boot | 0
arch/arm/mach-s5pv310/Makefile | 43 --------
arch/arm/mm/Kconfig | 2 +-
arch/arm/plat-s5p/Kconfig | 8 +-
8 files changed, 105 insertions(+), 110 deletions(-)
rename arch/arm/{mach-s5pv310 => mach-exynos4}/Kconfig (58%)
create mode 100644 arch/arm/mach-exynos4/Makefile
rename arch/arm/{mach-s5pv310 => mach-exynos4}/Makefile.boot (100%)
delete mode 100644 arch/arm/mach-s5pv310/Makefilearch/arm/Kconfig +6 -6
@@ -760,8 +760,8 @@ config ARCH_S5PV210 help Samsung S5PV210/S5PC110 series based systems -config ARCH_S5PV310 - bool "Samsung S5PV310/S5PC210" +config ARCH_EXYNOS4 + bool "Samsung EXYNOS4" select CPU_V7 select ARCH_SPARSEMEM_ENABLE select GENERIC_GPIO
@@ -772,7 +772,7 @@ config ARCH_S5PV310 select HAVE_S3C2410_I2C if I2C select HAVE_S3C2410_WATCHDOG if WATCHDOG help - Samsung S5PV310 series based systems + Samsung EXYNOS4 series based systems config ARCH_SHARK bool "Shark"
@@ -991,7 +991,7 @@ source "arch/arm/mach-s5pc100/Kconfig" source "arch/arm/mach-s5pv210/Kconfig" -source "arch/arm/mach-s5pv310/Kconfig" +source "arch/arm/mach-exynos4/Kconfig" source "arch/arm/mach-shmobile/Kconfig"
@@ -1253,7 +1253,7 @@ config SMP depends on GENERIC_CLOCKEVENTS depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ - ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ + ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE select USE_GENERIC_SMP_HELPERS select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
@@ -1353,7 +1353,7 @@ source kernel/Kconfig.preempt config HZ int default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ - ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310 + ARCH_S5P6442 || ARCH_S5PV210 || ARCH_EXYNOS4 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER default AT91_TIMER_HZ if ARCH_AT91 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
arch/arm/Makefile +1 -1
@@ -178,7 +178,7 @@ machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0 machine-$(CONFIG_ARCH_S5P6442) := s5p6442 machine-$(CONFIG_ARCH_S5PC100) := s5pc100 machine-$(CONFIG_ARCH_S5PV210) := s5pv210 -machine-$(CONFIG_ARCH_S5PV310) := s5pv310 +machine-$(CONFIG_ARCH_EXYNOS4) := exynos4 machine-$(CONFIG_ARCH_SA1100) := sa1100 machine-$(CONFIG_ARCH_SHARK) := shark machine-$(CONFIG_ARCH_SHMOBILE) := shmobile
arch/arm/mach-exynos4/Kconfig renamed from arch/arm/mach-s5pv310/Kconfig +50 -55
194 lines not on this page · raw message
arch/arm/mach-exynos4/Makefile new file +43 -0
43 lines not on this page · raw message
arch/arm/mach-exynos4/Makefile.boot renamed from arch/arm/mach-s5pv310/Makefile.boot +0 -0
arch/arm/mach-s5pv310/Makefile deleted +0 -43
43 lines not on this page · raw message
arch/arm/mm/Kconfig +1 -1
@@ -812,7 +812,7 @@ config CACHE_L2X0 bool "Enable the L2x0 outer cache controller" depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \ REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || \ - ARCH_NOMADIK || ARCH_OMAP4 || ARCH_S5PV310 || ARCH_TEGRA || \ + ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \ ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE default y select OUTER_CACHE
arch/arm/plat-s5p/Kconfig +4 -4
@@ -7,10 +7,10 @@ config PLAT_S5P bool - depends on (ARCH_S5P64X0 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5PV310) + depends on (ARCH_S5P64X0 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS4) default y - select ARM_VIC if !ARCH_S5PV310 - select ARM_GIC if ARCH_S5PV310 + select ARM_VIC if !ARCH_EXYNOS4 + select ARM_GIC if ARCH_EXYNOS4 select NO_IOPORT select ARCH_REQUIRE_GPIOLIB select S3C_GPIO_TRACK
@@ -41,7 +41,7 @@ comment "System MMU" config S5P_SYSTEM_MMU bool "S5P SYSTEM MMU" - depends on ARCH_S5PV310 + depends on ARCH_EXYNOS4 help Say Y here if you want to enable System MMU
Signature · 1 line
1.7.1
PATCH 8/11 ARM: exynos4_defconfig: Add defconfig for EXYNOS4
In reply to Kukjin KimCc Russell King <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
--- arch/arm/configs/exynos4_defconfig | 70 ++++++++++++++++++++++++++++++++++++ 1 files changed, 70 insertions(+), 0 deletions(-) create mode 100644 arch/arm/configs/exynos4_defconfig
arch/arm/configs/exynos4_defconfig new file +70 -0
@@ -0,0 +1,70 @@ +CONFIG_EXPERIMENTAL=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_KALLSYMS_ALL=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_ARCH_EXYNOS4=y +CONFIG_S3C_LOWLEVEL_UART_PORT=1 +CONFIG_MACH_SMDKC210=y +CONFIG_MACH_SMDKV310=y +CONFIG_MACH_UNIVERSAL_C210=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_SMP=y +CONFIG_NR_CPUS=2 +CONFIG_HOTPLUG_CPU=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc mem=256M" +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_SG=y +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_SAMSUNG=y +CONFIG_SERIAL_SAMSUNG_CONSOLE=y +CONFIG_HW_RANDOM=y +CONFIG_I2C=y +# CONFIG_HWMON is not set +# CONFIG_MFD_SUPPORT is not set +# CONFIG_HID_SUPPORT is not set +# CONFIG_USB_SUPPORT is not set +CONFIG_EXT2_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_CRAMFS=y +CONFIG_ROMFS_FS=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_BSD_DISKLABEL=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_KERNEL=y +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEBUG_RT_MUTEXES=y +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +CONFIG_DEBUG_SPINLOCK_SLEEP=y +CONFIG_DEBUG_INFO=y +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_ERRORS=y +CONFIG_DEBUG_LL=y +CONFIG_EARLY_PRINTK=y +CONFIG_DEBUG_S3C_UART=1 +CONFIG_CRC_CCITT=y
Signature · 1 line
1.7.1
PATCH 9/11 mtd: OneNAND: Change dependency of ARCH_EXYNOS4
In reply to Kukjin KimThis patch updates EXYNOS4 OneNAND support according to the change of ARCH name, EXYNOS4.
Cc Kyungmin Park <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
--- drivers/mtd/onenand/Kconfig | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
drivers/mtd/onenand/Kconfig +1 -1
@@ -32,7 +32,7 @@ config MTD_ONENAND_OMAP2 config MTD_ONENAND_SAMSUNG tristate "OneNAND on Samsung SOC controller support" - depends on ARCH_S3C64XX || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5PV310 + depends on ARCH_S3C64XX || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS4 help Support for a OneNAND flash device connected to an Samsung SOC. S3C64XX/S5PC100 use command mapping method.
Signature · 1 line
1.7.1
PATCH 10/11 ASoC: Change dependency of ARCH_EXYNOS4
In reply to Kukjin KimThis patch changes dependency of ARCH_EXYNOS4 from ARCH_S5PV310 according to the change of ARCH name, EXYNOS4.
Cc Jassi Brar <[email protected]>
Cc Liam Girdwood <[email protected]>
Cc Mark Brown <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
--- sound/soc/samsung/Kconfig | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
sound/soc/samsung/Kconfig +1 -1
@@ -1,6 +1,6 @@ config SND_SOC_SAMSUNG tristate "ASoC support for Samsung" - depends on ARCH_S3C2410 || ARCH_S3C64XX || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5P64X0 || ARCH_S5P6442 || ARCH_S5PV310 + depends on ARCH_S3C2410 || ARCH_S3C64XX || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5P64X0 || ARCH_S5P6442 || ARCH_EXYNOS4 select S3C64XX_DMA if ARCH_S3C64XX select S3C2410_DMA if ARCH_S3C2410 help
Signature · 1 line
1.7.1
PATCH 10/11 ASoC: Change dependency of ARCH_EXYNOS4
Quoted 2 lines · Kukjin Kim
This patch changes dependency of
ARCH_EXYNOS4fromARCH_S5PV310according to the change of ARCH name, EXYNOS4.
Acked-by Jassi Brar <[email protected]>
PATCH 10/11 ASoC: Change dependency of ARCH_EXYNOS4
In reply to Kukjin KimQuoted 2 lines · Kukjin Kim
This patch changes dependency of
ARCH_EXYNOS4fromARCH_S5PV310according to the change of ARCH name, EXYNOS4.
Acked-by Mark Brown <[email protected]>
PATCH 11/11 tty: Change dependency of ARCH_EXYNOS4
In reply to Kukjin KimThis patch changes dependency of ARCH_EXYNOS4 from ARCH_S5PV310 according to the change of ARCH name, EXYNOS4.
Cc Ben Dooks <[email protected]>
Cc Greg Kroah-Hartman <[email protected]>
Signed-off-by Kukjin Kim <[email protected]>
--- drivers/tty/serial/Kconfig | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
drivers/tty/serial/Kconfig +2 -2
@@ -537,8 +537,8 @@ config SERIAL_S3C6400 config SERIAL_S5PV210 tristate "Samsung S5PV210 Serial port support" - depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442 || CPU_S5PV310) - select SERIAL_SAMSUNG_UARTS_4 if (CPU_S5PV210 || CPU_S5PV310) + depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442 || CPU_EXYNOS4210) + select SERIAL_SAMSUNG_UARTS_4 if (CPU_S5PV210 || CPU_EXYNOS4210) default y help Serial port support for Samsung's S5P Family of SoC's
Signature · 1 line
1.7.1
cover ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310
In reply to Kukjin KimHi,
Wow, fast move, but need to more explanation.
what's the exact meaning of exynos4210?
Exynos4 is prefix and remaining are variants?
Now you changed all s5pv310 to exynos4. if new exynos4xxx chip are comes then how to handle this one?
e.g., exynos4220 or later.
it's also conflict with mach-exynos4. do you handle all exynos4 series at this mach directory?
historically there's no rules of the base RAM address at least samsung chips.
Thank you,
Kyungmin Park
Quoted 26 lines · Kukjin Kim
This patch set changes to
ARCH_EXYNOS4fromARCH_S5PV310for supporting Samsung's new brand name EXYNOS. Samsung officially announced about the brand name of EXYNOS at MWC 2011 and The EXYNOS4 integrates a ARM Cortex A9 microporcessor with several other peripherals to support features such as multimedai, storage, graphics and gaming. Especially, the EXYNOS4210 CPU which is one of EXYNOS4 SoC series can be used in products such as Mobile devices.This patch set consists of the following patches.
[PATCH 01/11] ARM: EXYNOS4: Add EXYNOS4 CPU initialization support [PATCH 02/11] ARM: EXYNOS4: Update Clock part
[PATCH 03/11] ARM: EXYNOS4: Update IRQ part
[PATCH 04/11] ARM: EXYNOS4: Update Timer part
[PATCH 05/11] ARM: EXYNOS4: Update device support
[PATCH 06/11] ARM: EXYNOS4: Moved board support files
[PATCH 07/11] ARM: EXYNOS4: UpdateKconfigandMakefilefor the newARCH_EXYNOS4[PATCH 08/11] ARM:exynos4_defconfig: Add defconfig for EXYNOS4 [PATCH 09/11] mtd: OneNAND: Change dependency ofARCH_EXYNOS4[PATCH 10/11] ASoC: Change dependency ofARCH_EXYNOS4
[PATCH 11/11] tty: Change dependency ofARCH_EXYNOS4_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
cover ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310
Hi,
I answer your questions in detail.
Quoted 7 lines · Kyungmin Park
Hi,
Wow, fast move, but need to more explanation.
what's the exact meaning of exynos4210?
Exynos4 is prefix and remaining are variants?
Exynos4210 means below.
1st digit means ARM core version. In this case, 4 means Cortex A9. (If we release cortex A15, it will be Exynos5xxx)
2nd digit means number of core. 2 mean dual core.
3rd digit means application category(LSI internal category). 4th digit means design rule (generation or shrink version)
Quoted 7 lines
Now you changed all s5pv310 to exynos4. if new exynos4xxx chip are comes then how to handle this one?
e.g., exynos4220 or later.
it's also conflict with mach-exynos4. do you handle all exynos4 series at this mach directory?
historically there's no rules of the base RAM address at least samsung chips.
Yes, we will handle all exynos4 series at mach-exynos4 directory. In the past, there is no rule.
But now, we are making consistent rules with AP design team. So, new version of exynos4 series will have same base RAM address.
Thanks and regards,
Sangbeom Kim
Quoted 42 lines
Thank you,
Kyungmin ParkQuoted 1 line · Kukjin Kim
This patch set changes to
ARCH_EXYNOS4fromARCH_S5PV310for supportingSamsung's
Quoted 1 line
new brand name EXYNOS. Samsung officially announced about the brand name
of EXYNOS
Quoted 1 line
at MWC 2011 and The EXYNOS4 integrates a ARM Cortex A9 microporcessor
with several
Quoted 1 line
other peripherals to support features such as multimedai, storage,
graphics and gaming.
Quoted 1 line
Especially, the EXYNOS4210 CPU which is one of EXYNOS4 SoC series can be
used in
Quoted 11 lines
products such as Mobile devices.
This patch set consists of the following patches.
[PATCH 01/11] ARM: EXYNOS4: Add EXYNOS4 CPU initialization support [PATCH 02/11] ARM: EXYNOS4: Update Clock part
[PATCH 03/11] ARM: EXYNOS4: Update IRQ part
[PATCH 04/11] ARM: EXYNOS4: Update Timer part
[PATCH 05/11] ARM: EXYNOS4: Update device support
[PATCH 06/11] ARM: EXYNOS4: Moved board support files [PATCH 07/11] ARM: EXYNOS4: UpdateKconfigandMakefilefor the new
ARCH_EXYNOS4Quoted 10 lines
[PATCH 08/11] ARM:
exynos4_defconfig: Add defconfig for EXYNOS4 [PATCH 09/11] mtd: OneNAND: Change dependency ofARCH_EXYNOS4[PATCH 10/11] ASoC: Change dependency ofARCH_EXYNOS4[PATCH 11/11] tty: Change dependency ofARCH_EXYNOS4_______________________________________________
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cover ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310
Quoted 11 lines · Sangbeom Kim
Hi,
I answer your questions in detail.Quoted 7 lines · Kyungmin Park
Hi,
Wow, fast move, but need to more explanation.
what's the exact meaning of exynos4210?
Exynos4 is prefix and remaining are variants?
Quoted 7 lines
Exynos4210 means below.
1st digit means ARM core version. In this case, 4 means Cortex A9. (If we release cortex A15, it will be Exynos5xxx)
2nd digit means number of core. ?2 mean dual core.
3rd digit means application category(LSI internal category). 4th digit means design rule (generation or shrink version)
Nice, I want these rules.
Quoted 9 lines
Quoted 8 lines
Now you changed all s5pv310 to exynos4. if new exynos4xxx chip are comes then how to handle this one?
e.g., exynos4220 or later.
it's also conflict with mach-exynos4. do you handle all exynos4 series at this mach directory?
historically there's no rules of the base RAM address at least samsung chips.
Quoted 4 lines
Yes, we will handle all exynos4 series at mach-exynos4 directory. In the past, there is no rule.
But now, we are making consistent rules with AP design team. So, new version of exynos4 series will have same base RAM address.
Okay, no problem with base ram address,
Another one is how do you handle the GPIOs?
Now it's also changed as EXYNOS4_GPXX, I think it's difficult to use the same banks as exynos4210 has if new chips are introduced. maybe IRQ also has similar issue.
Now these patches assumes all exynos4 has same gpios, irqs and so on.
How do you think about it?
Thank you,
Kyungmin Park
Quoted 52 lines
Thanks and regards,
Sangbeom KimQuoted 37 lines
Thank you,
Kyungmin ParkQuoted 1 line · Kukjin Kim
This patch set changes to
ARCH_EXYNOS4fromARCH_S5PV310for supportingSamsung's
Quoted 1 line
new brand name EXYNOS. Samsung officially announced about the brand name
of EXYNOS
Quoted 1 line
at MWC 2011 and The EXYNOS4 integrates a ARM Cortex A9 microporcessor
with several
Quoted 1 line
other peripherals to support features such as multimedai, storage,
graphics and gaming.
Quoted 1 line
Especially, the EXYNOS4210 CPU which is one of EXYNOS4 SoC series can be
used in
Quoted 11 lines
products such as Mobile devices.
This patch set consists of the following patches.
[PATCH 01/11] ARM: EXYNOS4: Add EXYNOS4 CPU initialization support [PATCH 02/11] ARM: EXYNOS4: Update Clock part
[PATCH 03/11] ARM: EXYNOS4: Update IRQ part
[PATCH 04/11] ARM: EXYNOS4: Update Timer part
[PATCH 05/11] ARM: EXYNOS4: Update device support
[PATCH 06/11] ARM: EXYNOS4: Moved board support files [PATCH 07/11] ARM: EXYNOS4: UpdateKconfigandMakefilefor the new
ARCH_EXYNOS4Quoted 10 lines
[PATCH 08/11] ARM:
exynos4_defconfig: Add defconfig for EXYNOS4 [PATCH 09/11] mtd: OneNAND: Change dependency ofARCH_EXYNOS4[PATCH 10/11] ASoC: Change dependency ofARCH_EXYNOS4[PATCH 11/11] tty: Change dependency ofARCH_EXYNOS4_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernelQuoted 5 lines
--
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cover ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310
Hi,
Quoted 34 lines · Kyungmin Park
Quoted 11 lines
Hi,
I answer your questions in detail.Quoted 7 lines · Kyungmin Park
Hi,
Wow, fast move, but need to more explanation.
what's the exact meaning of exynos4210?
Exynos4 is prefix and remaining are variants?Quoted 7 lines
Exynos4210 means below.
1st digit means ARM core version. In this case, 4 means Cortex A9. (If we release cortex A15, it will be Exynos5xxx)
2nd digit means number of core. ?2 mean dual core.
3rd digit means application category(LSI internal category). 4th digit means design rule (generation or shrink version)Nice, I want these rules.
Quoted 9 lines
Quoted 8 lines
Now you changed all s5pv310 to exynos4. if new exynos4xxx chip are comes then how to handle this one?
e.g., exynos4220 or later.
it's also conflict with mach-exynos4. do you handle all exynos4 series at this mach directory?
historically there's no rules of the base RAM address at least samsung chips.Quoted 4 lines
Yes, we will handle all exynos4 series at mach-exynos4 directory. In the past, there is no rule.
But now, we are making consistent rules with AP design team. So, new version of exynos4 series will have same base RAM address.
Quoted 6 lines
Okay, no problem with base ram address,
Another one is how do you handle the GPIOs?
Now it's also changed asEXYNOS4_GPXX, I think it's difficult to use the same banks as exynos4210 has if new chips are introduced. maybe IRQ also has similar issue.
We already had reviewed your concern before. S5P6450 and S5P6440 is basically same processor. But GPIO, IRQ and some peripheral is little different. We can handle that by checking each processors chipid.
Please check the below patch.
http://www.spinics.net/lists/linux-samsung-soc/msg03530.html
Thanks and regards,
Sangbeom Kim
Quoted 70 lines
Now these patches assumes all exynos4 has same gpios, irqs and so on.
How do you think about it?
Thank you,
Kyungmin ParkQuoted 9 lines
Thanks and regards,
Sangbeom KimQuoted 5 lines
Thank you,
Kyungmin ParkOn Mon, Feb 14, 2011 at 5:22 PM, Kukjin Kim <[email protected]>
Quoted 1 line · wrote:
Quoted 1 line
Quoted 1 line
This patch set changes to
ARCH_EXYNOS4fromARCH_S5PV310forsupporting
Quoted 2 lines
Quoted 2 lines
Samsung's
Quoted 1 line
new brand name EXYNOS. Samsung officially announced about the brand
name
Quoted 6 lines
Quoted 6 lines
of EXYNOS
Quoted 1 line
at MWC 2011 and The EXYNOS4 integrates a ARM Cortex A9 microporcessor
with several
Quoted 1 line
other peripherals to support features such as multimedai, storage,
graphics and gaming.
Quoted 1 line
Especially, the EXYNOS4210 CPU which is one of EXYNOS4 SoC series can
be
Quoted 18 lines
Quoted 18 lines
used in
Quoted 11 lines
products such as Mobile devices.
This patch set consists of the following patches.
[PATCH 01/11] ARM: EXYNOS4: Add EXYNOS4 CPU initialization support [PATCH 02/11] ARM: EXYNOS4: Update Clock part
[PATCH 03/11] ARM: EXYNOS4: Update IRQ part
[PATCH 04/11] ARM: EXYNOS4: Update Timer part
[PATCH 05/11] ARM: EXYNOS4: Update device support
[PATCH 06/11] ARM: EXYNOS4: Moved board support files [PATCH 07/11] ARM: EXYNOS4: UpdateKconfigandMakefilefor the new
ARCH_EXYNOS4Quoted 5 lines
[PATCH 08/11] ARM:
exynos4_defconfig: Add defconfig for EXYNOS4 [PATCH 09/11] mtd: OneNAND: Change dependency ofARCH_EXYNOS4[PATCH 10/11] ASoC: Change dependency ofARCH_EXYNOS4[PATCH 11/11] tty: Change dependency ofARCH_EXYNOS4Quoted 7 lines
Quoted 7 lines
Quoted 5 lines
_______________________________________________
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linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-
Quoted 6 lines
Quoted 3 lines
soc" in
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To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
Quoted 3 lines
the body of a message to majordomo at vger.kernel.org More majordomo info at ?http://vger.kernel.org/majordomo-info.html
--
To unsubscribe from this list: send the line "unsubscribe linux-samsung- soc" in
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More majordomo info at http://vger.kernel.org/majordomo-info.html
cover ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310
Quoted 44 lines · Sangbeom Kim
Hi,
Quoted 34 lines · Kyungmin Park
Quoted 11 lines
Hi,
I answer your questions in detail.Quoted 7 lines · Kyungmin Park
Hi,
Wow, fast move, but need to more explanation.
what's the exact meaning of exynos4210?
Exynos4 is prefix and remaining are variants?Quoted 7 lines
Exynos4210 means below.
1st digit means ARM core version. In this case, 4 means Cortex A9. (If we release cortex A15, it will be Exynos5xxx)
2nd digit means number of core. ?2 mean dual core.
3rd digit means application category(LSI internal category). 4th digit means design rule (generation or shrink version)Nice, I want these rules.
Quoted 9 lines
Quoted 8 lines
Now you changed all s5pv310 to exynos4. if new exynos4xxx chip are comes then how to handle this one?
e.g., exynos4220 or later.
it's also conflict with mach-exynos4. do you handle all exynos4 series at this mach directory?
historically there's no rules of the base RAM address at least samsung chips.Quoted 4 lines
Yes, we will handle all exynos4 series at mach-exynos4 directory. In the past, there is no rule.
But now, we are making consistent rules with AP design team. So, new version of exynos4 series will have same base RAM address.Quoted 6 lines
Okay, no problem with base ram address,
Another one is how do you handle the GPIOs?
Now it's also changed asEXYNOS4_GPXX, I think it's difficult to use the same banks as exynos4210 has if new chips are introduced. maybe IRQ also has similar issue.
Quoted 7 lines
We already had reviewed your concern before. S5P6450 and S5P6440 is basically same processor. But GPIO, IRQ and some peripheral is little different. We can handle that by checking each processors chipid.
Please check the below patch.
http://www.spinics.net/lists/linux-samsung-soc/msg03530.html
Right, in this patch it used the S5P64XX, S5P6440, and S5P6450 is used. but EXYNOS patches used the EXYNOS4 prefix instead of EXYNOS4210 at least at GPIO patch.
maybe you will rename it as EXYNOS4210 and use the EXYNOS4 as representative prefix.
Anyway it means it will use the cpu_is_exynos4210 or similar style to detect each cpu. and assign proper data structure
Then I recommend that create the cpu.h header file as other SOC does and use a common macro if new one comes.
Thank you,
Kyungmin Park
Quoted 79 lines
Thanks and regards,
Sangbeom KimQuoted 62 lines
Now these patches assumes all exynos4 has same gpios, irqs and so on.
How do you think about it?
Thank you,
Kyungmin ParkQuoted 9 lines
Thanks and regards,
Sangbeom KimQuoted 5 lines
Thank you,
Kyungmin ParkOn Mon, Feb 14, 2011 at 5:22 PM, Kukjin Kim <[email protected]>
Quoted 1 line · wrote:
Quoted 1 line
Quoted 1 line
This patch set changes to
ARCH_EXYNOS4fromARCH_S5PV310forsupporting
Quoted 2 lines
Quoted 2 lines
Samsung's
Quoted 1 line
new brand name EXYNOS. Samsung officially announced about the brand
name
Quoted 6 lines
Quoted 6 lines
of EXYNOS
Quoted 1 line
at MWC 2011 and The EXYNOS4 integrates a ARM Cortex A9 microporcessor
with several
Quoted 1 line
other peripherals to support features such as multimedai, storage,
graphics and gaming.
Quoted 1 line
Especially, the EXYNOS4210 CPU which is one of EXYNOS4 SoC series can
be
Quoted 18 lines
Quoted 18 lines
used in
Quoted 11 lines
products such as Mobile devices.
This patch set consists of the following patches.
[PATCH 01/11] ARM: EXYNOS4: Add EXYNOS4 CPU initialization support [PATCH 02/11] ARM: EXYNOS4: Update Clock part
[PATCH 03/11] ARM: EXYNOS4: Update IRQ part
[PATCH 04/11] ARM: EXYNOS4: Update Timer part
[PATCH 05/11] ARM: EXYNOS4: Update device support
[PATCH 06/11] ARM: EXYNOS4: Moved board support files [PATCH 07/11] ARM: EXYNOS4: UpdateKconfigandMakefilefor the new
ARCH_EXYNOS4Quoted 5 lines
[PATCH 08/11] ARM:
exynos4_defconfig: Add defconfig for EXYNOS4 [PATCH 09/11] mtd: OneNAND: Change dependency ofARCH_EXYNOS4[PATCH 10/11] ASoC: Change dependency ofARCH_EXYNOS4[PATCH 11/11] tty: Change dependency ofARCH_EXYNOS4Quoted 7 lines
Quoted 7 lines
Quoted 5 lines
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-
Quoted 6 lines
Quoted 3 lines
soc" in
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Quoted 8 lines
Quoted 3 lines
the body of a message to majordomo at vger.kernel.org More majordomo info at ?http://vger.kernel.org/majordomo-info.html
--
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cover ARM: EXYNOS4: Change ARCH name, ARCH_EXYNOS4 from ARCH_S5PV310
In reply to Kukjin KimQuoted 4 lines · Kukjin Kim
This patch set changes to
ARCH_EXYNOS4fromARCH_S5PV310for supporting Samsung's
new brand name EXYNOS. Samsung officially announced about the brand name
of
Quoted 4 lines
EXYNOS
at MWC 2011 and The EXYNOS4 integrates a ARM Cortex A9 microporcessor with several
other peripherals to support features such as multimedai, storage,
graphics
Quoted 2 lines
and gaming.
Especially, the EXYNOS4210 CPU which is one of EXYNOS4 SoC series can be
used
Quoted 3 lines
in
products such as Mobile devices.
Hi all,
If there are no more comments for this, will merge this into for-next this weekend.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.