mmc: omap_hsmmc: support SDIO cards

drivers/mmc/host/omap_hsmmc.c +24 -0

+static void omap_hsmmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
+{
+	struct omap_hsmmc_host *host = mmc_priv(mmc);
+	u32 ie, con;
+	unsigned long flags;
+
+	spin_lock_irqsave(&host->irq_lock, flags);
+
+	/*
+	 * When interrupts are enabled, CTPL must be set to enable
+	 * DAT1 input buffer (or the card interrupt is always
+	 * asserted) and FCLK must be enabled else wakeup does not
+	 * work.
+	 *
+	 * FIXME: the power save code probably shouldn't be playing
+	 * with FCLK and allow the clock subsystem to put it into
+	 * smart-idle mode instead.
+	 */
+	con = OMAP_HSMMC_READ(host->base, CON);
+	ie = OMAP_HSMMC_READ(host->base, IE);
+	if (enable) {
+		clk_enable(host->fclk);
+		ie |= CIRQ_ENABLE;
+		con |= CTPL;

From: [email protected] [mailto:linux-omap- [email protected]] On Behalf Of David Vrabel
Sent: Wednesday, February 17, 2010 7:10 PM

Quoted 25 lines · David Vrabel

drivers/mmc/host/omap_hsmmc.c +24 -0

+static void omap_hsmmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
+{
+    struct omap_hsmmc_host *host = mmc_priv(mmc);
+    u32 ie, con;
+    unsigned long flags;
+
+    spin_lock_irqsave(&host->irq_lock, flags);
+
+    /*
+     * When interrupts are enabled, CTPL must be set to enable
+     * DAT1 input buffer (or the card interrupt is always
+     * asserted) and FCLK must be enabled else wakeup does not
+     * work.
+     *
+     * FIXME: the power save code probably shouldn't be playing
+     * with FCLK and allow the clock subsystem to put it into
+     * smart-idle mode instead.
+     */
+    con = OMAP_HSMMC_READ(host->base, CON);
+    ie = OMAP_HSMMC_READ(host->base, IE);
+    if (enable) {
+            clk_enable(host->fclk);
+            ie |= CIRQ_ENABLE;
+            con |= CTPL;

drivers/mmc/host/omap_hsmmc.c static int omap_hsmmc_get_ro(struct mmc_host *mmc) · line 1285

Quoted 10 lines

drivers/mmc/host/omap_hsmmc.c +10 -0

+    } else {
+            clk_disable(host->fclk);
+            ie &= ~CIRQ_ENABLE;
+            con &= ~CTPL;
+    }
+    OMAP_HSMMC_WRITE(host->base, CON, con);
+    OMAP_HSMMC_WRITE(host->base, IE, ie);
+
+    spin_unlock_irqrestore(&host->irq_lock, flags);
+}

This isn't doing a posted write flush but when it's added this ends up looking like:

      spin_lock_irqsave(&host->lock, flags);

      /*
       * When interrupts are enabled, CTPL must be set to enable
       * DAT1 input buffer (or the card interrupt is always
       * asserted) and FCLK must be enabled else wakeup does not
       * work.  Take care to disable FCLK after all the register
       * accesses as they might not complete if FCLK is off.
       *
       * FIXME: the power save code probably shouldn't be playing
       * with FCLK and allow the clock subsystem to put it into
       * smart-idle mode instead.
       */
      con = OMAP_HSMMC_READ(host->base, CON);
      ie = OMAP_HSMMC_READ(host->base, IE);
      if (enable) {
              clk_enable(host->fclk);
              ie |= CIRQ_ENABLE;
              con |= CTPL;
      } else {
              ie &= ~CIRQ_ENABLE;
              con &= ~CTPL;
      }
      OMAP_HSMMC_WRITE(host->base, CON, con);
      OMAP_HSMMC_WRITE(host->base, IE, ie);
      OMAP_HSMMC_READ(host->base, IE); /* flush posted write */
       if (!enable) {
           clk_disable(host->fclk);
       }

      spin_unlock_irqrestore(&host->lock, flags);

Could someone from TI could comment on why disabling FCLK affects register read?

-----Original Message-----
From: David Vrabel [mailto:[email protected]]
Sent: Wednesday, February 10, 2010 5:52 AM
To: [email protected]
Cc: David Vrabel; [email protected]; [email protected]
Subject: [PATCH 3/3] mmc: omap_hsmmc: enable SDIO card interrupts

Enable the use of SDIO card interrupts. This requires setting ENAWAKEUP in SYSCONFIG and IWE in HTCL to allow the MMC block to wake-up when in smart-idle mode.

FCLK must be enabled while SDIO interrupts are enabled or the MMC block won't wake-up.

The writes to STAT and ISE when starting a command are unnecessary and have been removed.

Signed-off-by David Vrabel <[email protected]>

---
As noted in the FIXME comment, I think the correct thing to do is to always leave FCLK enabled. The clock/clockdomain subsystems should be configuring smart-idle mode making explicit calls to disable FCLK unnecessary. I couldn't follow the clock subsystem to see if it was actually doing this, though.

---
 drivers/mmc/host/omap_hsmmc.c |   94 ++++++++++++++++++++++++++++--------
-----
 1 files changed, 65 insertions(+), 29 deletions(-)

drivers/mmc/host/omap_hsmmc.c +6 -1

index e6d8cb3..ad0f867 100644
@@ -64,6 +64,7 @@
 #define SDVS_MASK		0x00000E00
 #define SDVSCLR			0xFFFFF1FF
 #define SDVSDET			0x00000400
+#define ENAWAKEUP		(1 << 2)
 #define AUTOIDLE		0x1
 #define SDBP			(1 << 8)
 #define DTO			0xe

@@ -74,9 +75,11 @@
 #define CLKD_SHIFT		6
 #define DTO_MASK		0x000F0000
 #define DTO_SHIFT		16
+#define CIRQ_ENABLE		(1 << 8)
 #define INT_EN_MASK		0x307F0033
 #define BWR_ENABLE		(1 << 4)
 #define BRR_ENABLE		(1 << 5)
+#define CTPL			(1 << 11)
 #define INIT_STREAM		(1 << 1)
 #define DP_SELECT		(1 << 21)
 #define DDIR			(1 << 4)

@@ -84,10 +87,12 @@
 #define MSBS			(1 << 5)
 #define BCE			(1 << 1)
 #define FOUR_BIT		(1 << 1)
+#define IWE			(1 << 24)
 #define DW8			(1 << 5)
 #define CC			0x1
 #define TC			0x02
 #define OD			0x1
+#define CIRQ			(1 << 8)
 #define ERR			(1 << 15)
 #define CMD_TIMEOUT		(1 << 16)
 #define DATA_TIMEOUT		(1 << 20)

@@ -228,7 +233,7 @@ static int omap_hsmmc_context_restore(struct
 omap_hsmmc_host *host)
 		;
 
 	OMAP_HSMMC_WRITE(host->base, SYSCONFIG,
-			OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE);
+			OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE |
 ENAWAKEUP);
 

drivers/mmc/host/omap_hsmmc.c +1 -1

 	if (host->id == OMAP_MMC1_DEVID) {
 		if (host->power_mode != MMC_POWER_OFF &&

@@ -243,7 +248,7 @@ static int omap_hsmmc_context_restore(struct
 omap_hsmmc_host *host)
 	}
 
 	OMAP_HSMMC_WRITE(host->base, HCTL,
-			OMAP_HSMMC_READ(host->base, HCTL) | hctl);
+			OMAP_HSMMC_READ(host->base, HCTL) | hctl | IWE);
 
 	OMAP_HSMMC_WRITE(host->base, CAPA,

drivers/mmc/host/omap_hsmmc.c +1 -1

 			OMAP_HSMMC_READ(host->base, CAPA) | capa);

@@ -257,7 +262,7 @@ static int omap_hsmmc_context_restore(struct
 omap_hsmmc_host *host)
 		;
 
 	OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
-	OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
+	OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK | CIRQ);
 	OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK);
 

drivers/mmc/host/omap_hsmmc.c +0 -6

 	/* Do not initialize card-specific things if the power is off */

@@ -426,12 +431,6 @@ omap_hsmmc_start_command(struct omap_hsmmc_host
 *host, struct mmc_command *cmd,
 		mmc_hostname(host->mmc), cmd->opcode, cmd->arg);
 	host->cmd = cmd;
 
-	/*
-	 * Clear status bits and enable interrupts
-	 */
-	OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
-	OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
-
 	if (host->use_dma)
 		OMAP_HSMMC_WRITE(host->base, IE,

drivers/mmc/host/omap_hsmmc.c +12 -9

 				 INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE));

@@ -638,18 +637,21 @@ static irqreturn_t omap_hsmmc_irq(int irq, void
 *dev_id)
 {
 	struct omap_hsmmc_host *host = dev_id;
 	struct mmc_data *data;
-	int end_cmd = 0, end_trans = 0, status;
+	u32 status;
+	int end_cmd = 0, end_trans = 0;
+	bool card_irq = false;
 
 	spin_lock(&host->irq_lock);
 
-	if (host->mrq == NULL) {
-		OMAP_HSMMC_WRITE(host->base, STAT,
-			OMAP_HSMMC_READ(host->base, STAT));
-		/* Flush posted write */
-		OMAP_HSMMC_READ(host->base, STAT);
-		spin_unlock(&host->irq_lock);
-		return IRQ_HANDLED;
-	}
+	status = OMAP_HSMMC_READ(host->base, STAT);
+	OMAP_HSMMC_WRITE(host->base, STAT, status);
+	OMAP_HSMMC_READ(host->base, STAT); /* Flush posted write. */
+
+	if (status & CIRQ)
+		card_irq = true;
+
+	if (host->mrq == NULL)
+		goto out;
 
 	data = host->data;

drivers/mmc/host/omap_hsmmc.c +41 -7

 	status = OMAP_HSMMC_READ(host->base, STAT);

@@ -704,17 +706,16 @@ static irqreturn_t omap_hsmmc_irq(int irq, void
 *dev_id)
 		}
 	}
 
-	OMAP_HSMMC_WRITE(host->base, STAT, status);
-	/* Flush posted write */
-	OMAP_HSMMC_READ(host->base, STAT);
-
 	if (end_cmd || ((status & CC) && host->cmd))
 		omap_hsmmc_cmd_done(host, host->cmd);
 	if ((end_trans || (status & TC)) && host->mrq)
 		omap_hsmmc_xfer_done(host, data);
-
+out:
 	spin_unlock(&host->irq_lock);
 
+	if (card_irq)
+		mmc_signal_sdio_irq(host->mmc);
+
 	return IRQ_HANDLED;
 }

@@ -1248,6 +1249,41 @@ static int omap_hsmmc_get_ro(struct mmc_host *mmc)
 	return mmc_slot(host).get_ro(host->dev, 0);
 }
 
+static void omap_hsmmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
+{
+	struct omap_hsmmc_host *host = mmc_priv(mmc);
+	u32 ie, con;
+	unsigned long flags;
+
+	spin_lock_irqsave(&host->irq_lock, flags);
+
+	/*
+	 * When interrupts are enabled, CTPL must be set to enable
+	 * DAT1 input buffer (or the card interrupt is always
+	 * asserted) and FCLK must be enabled else wakeup does not
+	 * work.
+	 *
+	 * FIXME: the power save code probably shouldn't be playing
+	 * with FCLK and allow the clock subsystem to put it into
+	 * smart-idle mode instead.
+	 */
+	con = OMAP_HSMMC_READ(host->base, CON);
+	ie = OMAP_HSMMC_READ(host->base, IE);
+	if (enable) {
+		clk_enable(host->fclk);
+		ie |= CIRQ_ENABLE;
+		con |= CTPL;
+	} else {
+		clk_disable(host->fclk);
+		ie &= ~CIRQ_ENABLE;
+		con &= ~CTPL;
+	}
+	OMAP_HSMMC_WRITE(host->base, CON, con);
+	OMAP_HSMMC_WRITE(host->base, IE, ie);
+
+	spin_unlock_irqrestore(&host->irq_lock, flags);
+}
+
 static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host)
 {
 	u32 hctl, capa, value;

@@ -1262,14 +1298,14 @@ static void omap_hsmmc_conf_bus_power(struct
 omap_hsmmc_host *host)
 	}
 
 	value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK;
-	OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl);
+	OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl | IWE);
 
 	value = OMAP_HSMMC_READ(host->base, CAPA);
 	OMAP_HSMMC_WRITE(host->base, CAPA, value | capa);
 
 	/* Set the controller to AUTO IDLE mode */
 	value = OMAP_HSMMC_READ(host->base, SYSCONFIG);
-	OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE);
+	OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE |
 ENAWAKEUP);
 

drivers/mmc/host/omap_hsmmc.c +2 -2

 	/* Set SD bus power bit */
 	set_sd_bus_power(host);

@@ -1516,7 +1552,7 @@ static const struct mmc_host_ops omap_hsmmc_ops = {
 	.set_ios = omap_hsmmc_set_ios,
 	.get_cd = omap_hsmmc_get_cd,
 	.get_ro = omap_hsmmc_get_ro,
-	/* NYET -- enable_sdio_irq */
+	.enable_sdio_irq = omap_hsmmc_enable_sdio_irq,
 };
 
 static const struct mmc_host_ops omap_hsmmc_ps_ops = {

@@ -1526,7 +1562,7 @@ static const struct mmc_host_ops omap_hsmmc_ps_ops =
 {
 	.set_ios = omap_hsmmc_set_ios,
 	.get_cd = omap_hsmmc_get_cd,
 	.get_ro = omap_hsmmc_get_ro,
-	/* NYET -- enable_sdio_irq */
+	.enable_sdio_irq = omap_hsmmc_enable_sdio_irq,
 };
 

#ifdef CONFIG_DEBUG_FS

drivers/mmc/host/omap_hsmmc.c +1 -1

@@ -1731,7 +1767,7 @@ static int __init omap_hsmmc_probe(struct
 platform_device *pdev)
 	mmc->max_seg_size = mmc->max_req_size;
 
 	mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
-		     MMC_CAP_WAIT_WHILE_BUSY;
+		     MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_SDIO_IRQ;
 
 	if (mmc_slot(host).wires >= 8)

drivers/mmc/host/omap_hsmmc.c +1 -1

 		mmc->caps |= MMC_CAP_8_BIT_DATA;

@@ -1802,7 +1838,7 @@ static int __init omap_hsmmc_probe(struct
 platform_device *pdev)
 		}
 	}
 
-	OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
+	OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK | CIRQ);
 	OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK);
 

mmc_host_lazy_disable(host->mmc);
--
1.6.3.3

Quoted 12 lines

-----Original Message-----
From: David Vrabel [mailto:[email protected]]
Sent: Wednesday, February 10, 2010 5:52 AM
To: [email protected]
Cc: David Vrabel; [email protected]; [email protected]
Subject: [PATCH 3/3] mmc: omap_hsmmc: enable SDIO card interrupts

Enable the use of SDIO card interrupts. This requires setting ENAWAKEUP in SYSCONFIG and IWE in HTCL to allow the MMC block to wake-up when in smart-idle mode.

Quoted 3 lines

FCLK must be enabled while SDIO interrupts are enabled or the MMC block won't wake-up.

I am curious to know the system behavior with this patch. Does the FCLK remain enabled forever if a SDIO card is detected on the bus?

Quoted 12 lines · Madhusudhan

Quoted 12 lines

-----Original Message-----
From: David Vrabel [mailto:[email protected]]
Sent: Wednesday, February 10, 2010 5:52 AM
To: [email protected]
Cc: David Vrabel; [email protected]; [email protected]
Subject: [PATCH 3/3] mmc: omap_hsmmc: enable SDIO card interrupts

Enable the use of SDIO card interrupts. This requires setting ENAWAKEUP in SYSCONFIG and IWE in HTCL to allow the MMC block to wake-up when in smart-idle mode.

Quoted 6 lines

Quoted 3 lines

FCLK must be enabled while SDIO interrupts are enabled or the MMC block won't wake-up.

I am curious to know the system behavior with this patch. Does the FCLK remain enabled forever if a SDIO card is detected on the bus?

Only if card interrupts are enabled. The card irq is disabled when the sdio_irq_thread exits.

This is why I think that smart-idle mode needs to be used (it's turned on by default on the MMC controller) but I don't understand the clock/clockdomain code to see if that's doing the right thing.

If smart-idle mode is used then we don't need to disable FCLK manually to save power. This will simplify the driver a bit.

Perhaps I'm misunderstanding what you're referring to, but it seems there is some confusion as to what target smart-idle mode does.

Quoted 3 lines · Paul Walmsley

Perhaps I'm misunderstanding what you're referring to, but it seems there is some confusion as to what target smart-idle mode does.

The TI OMAP 34xx TRM is the one of the most obtuse document I've had to read. An even after multiple reads of relevant sections it still doesn't make sense. Parts are contradictory, parts are poorly explained and some bit are just plain incorrect.

I don't have time to sort out any of this properly -- it works well enough for me.

-----Original Message-----
From: Paul Walmsley [mailto:[email protected]]
Sent: Thursday, February 18, 2010 11:44 AM
To: David Vrabel
Cc: Madhusudhan; [email protected]; [email protected]
Subject: Re: [PATCH 3/3] mmc: omap_hsmmc: enable SDIO card interrupts

Quoted 3 lines · David Vrabel

Quoted 2 lines · Paul Walmsley

Perhaps I'm misunderstanding what you're referring to, but it seems

there

Quoted 6 lines

Quoted 1 line

is some confusion as to what target smart-idle mode does.

The TI OMAP 34xx TRM is the one of the most obtuse document I've had to read. An even after multiple reads of relevant sections it still doesn't make sense. Parts are contradictory, parts are poorly explained and some bit are just plain incorrect.

Yes. TI needs to also release the functional specifications for each IP block; the information in the current TRM is generally insufficient to write high-quality drivers.

TI should also host a process, open to the public, to submit TRM revision and clarification requests, and to track their disposition.

Quoted 2 lines

I don't have time to sort out any of this properly -- it works well enough for me.

Thanks very much for the SDIO patches. They are appreciated.

- Paul

If I look in the mainline kernel today there is only one SDIO card driver " sdio_uart.c". And at least I don't see a way I can test any of these features myself.

-----Original Message-----
From: Nicolas Pitre [mailto:[email protected]]
Sent: Thursday, February 18, 2010 1:27 PM
To: Madhusudhan
Cc: 'Paul Walmsley'; 'David Vrabel'; [email protected]; linux- [email protected]
Subject: RE: [PATCH 3/3] mmc: omap_hsmmc: enable SDIO card interrupts

Quoted 1 line · Madhusudhan

If I look in the mainline kernel today there is only one SDIO card

driver "

Quoted 2 lines

sdio_uart.c". And at least I don't see a way I can test any of these features myself.

There are many other SDIO drivers in the kernel today:

- The libertas wireless driver supports many interfaces, including PCMCIA/CF, USB, SDIO and SPI. Chips known to work with the SDIO interface are the Marvell 8686 and 8688.

- There is a BlueTooth HCI SDIO driver implementing the standard SDIO BlueTooth class.

- The Marvell 8688 mentioned above is also a BlueTooth device through an additional SDIO "function".

- Intel Wireless WiMAX Connection 2400 over SDIO.

And the sdio_uart.c driver can be used with SDIO GPS receivers for example.

Nicolas

Not to add further confusion but as far as I understand SDIO should be able to asynchronously wakeup OMAP regardless of MMC clocks being OFF . As per the SDIO spec DAT1 line is used for signaling the card interrupt to the host. The TRM clearly shows a GPIO connected to DAT1 line for wakeup through the SDIO interrupt. Wouldn't this help?

Definitely these are good features that are being added. Just that there are confusions around and not everyone has a setup to validate these features.

If I look in the mainline kernel today there is only one SDIO card driver " sdio_uart.c".

And at least I don't see a way I can test any of these features myself.

(cc'ing Steve, Richard, Anand)

There appear to be least seven SDIO card drivers in 2.6.34-rc7. At least one of these is for a TI chip - the wl1251.  I think some of the Gumstix Overo OMAP3 boards are using an SDIO-connected Marvell Libertas:

http://www.gumstix.com/store/catalog/product_info.php?products_id=252

David is probably testing with a Bluetooth card - maybe he can comment further.

Quoted 1 line

And at least I don't see a way I can test any of these features myself.

Could you clarify?

- Paul

Quoted 6 lines · Paul Walmsley

(cc'ing Steve, Richard, Anand)

There appear to be least seven SDIO card drivers in 2.6.34-rc7. At least one of these is for a TI chip - the wl1251.  I think some of the Gumstix Overo OMAP3 boards are using an SDIO-connected Marvell Libertas:

Quoted 1 line

http://www.gumstix.com/store/catalog/product_info.php?products_id=252

That is correct, a Wi2Wi wifi module is connected via mmc2 on the Overo Air and Fire products.

Data rates are pretty low with the existing OMAP SDIO driver. Any
chance this patch would improve that situation?

-----Original Message-----
From: Steve Sakoman [mailto:[email protected]]
Sent: Thursday, February 18, 2010 4:16 PM
To: Paul Walmsley
Cc: Madhusudhan; David Vrabel; [email protected]; [email protected]; linux- [email protected]; [email protected]
Subject: Re: [PATCH 3/3] mmc: omap_hsmmc: enable SDIO card interrupts

Quoted 1 line · Paul Walmsley

(cc'ing Steve, Richard, Anand)

Quoted 5 lines

There appear to be least seven SDIO card drivers in 2.6.34-rc7. At least one of these is for a TI chip - the wl1251.  I think some of the Gumstix Overo OMAP3 boards are using an SDIO-connected Marvell Libertas:

http://www.gumstix.com/store/catalog/product_info.php?products_id=252

That is correct, a Wi2Wi wifi module is connected via mmc2 on the Overo Air and Fire products.

Data rates are pretty low with the existing OMAP SDIO driver. Any
chance this patch would improve that situation?

Just added applying the patch and retesting data rates to my "to do" list :-)

Steve

Quoted 10 lines

David is probably testing with a Bluetooth card - maybe he can comment further.

Quoted 1 line

And at least I don't see a way I can test any of these features myself.

Could you clarify?

- Paul

Quoted 2 lines

That is correct, a Wi2Wi wifi module is connected via mmc2 on the Overo Air and Fire products.

A dumb question. Is this Wi2Wi wifi module available as a standard SDIO card which can be plugged into a SD card cage? Or is it specifically designed for the gumstix board?

-----Original Message-----
From: Paul Walmsley [mailto:[email protected]]
Sent: Thursday, February 18, 2010 2:21 PM
To: Madhusudhan
Cc: 'David Vrabel'; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]
Subject: RE: [PATCH 3/3] mmc: omap_hsmmc: enable SDIO card interrupts

Hi,

(cc'ing Steve, Richard, Anand)

Quoted 5 lines · Madhusudhan

Not to add further confusion but as far as I understand SDIO should be able to asynchronously wakeup OMAP regardless of MMC clocks being OFF . As per the SDIO spec DAT1 line is used for signaling the card interrupt to the host. The TRM clearly shows a GPIO connected to DAT1 line for wakeup through the SDIO interrupt. Wouldn't this help?

Is the integration code in arch/arm/*omap* set to enable wakeup on the DAT1 ball on the OMAP? I don't see any trace of that in the code. That would surely prevent wakeup from succeeding on an off-mode enabled kernel. Sounds like there may be other problems. Why not give it a try with an SDIO card and see if you can get it to work?

Quoted 3 lines

Definitely these are good features that are being added. Just that there are confusions around and not everyone has a setup to validate these features.

Hopefully someone inside TI is validating SDIO wakeup on Linux?

Quoted 2 lines

If I look in the mainline kernel today there is only one SDIO card driver " sdio_uart.c".

[paul@twilight current]$ find . -name "*sdio*c" -print | fgrep -v /core/ ./drivers/ssb/sdio.c
./drivers/bluetooth/btsdio.c ./drivers/bluetooth/btmrvl_sdio.c ./drivers/mmc/host/mvsdio.c ./drivers/net/wimax/i2400m/sdio-rx.c ./drivers/net/wimax/i2400m/sdio-tx.c ./drivers/net/wimax/i2400m/sdio.c ./drivers/net/wimax/i2400m/sdio-fw.c ./drivers/net/wireless/iwmc3200wifi/sdio.c ./drivers/net/wireless/libertas/if_sdio.c ./drivers/net/wireless/wl12xx/wl1251_sdio.c ./drivers/net/wireless/b43/sdio.c ./drivers/media/dvb/siano/smssdio.c
[paul@twilight current]$

There appear to be least seven SDIO card drivers in 2.6.34-rc7. At least one of these is for a TI chip - the wl1251. I think some of the Gumstix Overo OMAP3 boards are using an SDIO-connected Marvell Libertas:

http://www.gumstix.com/store/catalog/product_info.php?products_id=252

David is probably testing with a Bluetooth card - maybe he can comment further.

Quoted 1 line

And at least I don't see a way I can test any of these features myself.

Could you clarify?

- Paul

-----Original Message-----
From: David Vrabel [mailto:[email protected]]
Sent: Wednesday, February 17, 2010 1:40 PM
To: Madhusudhan
Cc: [email protected]; [email protected]
Subject: Re: [PATCH 3/3] mmc: omap_hsmmc: enable SDIO card interrupts

Quoted 9 lines · Madhusudhan

Quoted 9 lines

-----Original Message-----
From: David Vrabel [mailto:[email protected]]
Sent: Wednesday, February 10, 2010 5:52 AM
To: [email protected]
Cc: David Vrabel; [email protected]; [email protected]
Subject: [PATCH 3/3] mmc: omap_hsmmc: enable SDIO card interrupts

Enable the use of SDIO card interrupts. This requires setting

ENAWAKEUP

Quoted 7 lines

Quoted 6 lines

in SYSCONFIG and IWE in HTCL to allow the MMC block to wake-up when in smart-idle mode.

FCLK must be enabled while SDIO interrupts are enabled or the MMC block won't wake-up.

Quoted 2 lines

I am curious to know the system behavior with this patch. Does the FCLK remain enabled forever if a SDIO card is detected on the bus?

Only if card interrupts are enabled. The card irq is disabled when the sdio_irq_thread exits.

This is why I think that smart-idle mode needs to be used (it's turned on by default on the MMC controller) but I don't understand the clock/clockdomain code to see if that's doing the right thing.

If smart-idle mode is used then we don't need to disable FCLK manually to save power. This will simplify the driver a bit.

David

My question was more related to the idle path. In a scenario where you start using the SDIO functionality and after some time you leave the SDIO card idle, does the FCLK still remain enabled? Or do you see that sdio_irq_thread exits and disables the FCLK?

-----Original Message-----
From: David Vrabel [mailto:[email protected]]
Sent: Thursday, February 18, 2010 6:16 AM
To: Madhusudhan
Cc: [email protected]; [email protected]
Subject: Re: [PATCH 3/3] mmc: omap_hsmmc: enable SDIO card interrupts

Quoted 5 lines · Madhusudhan

My question was more related to the idle path. In a scenario where you start using the SDIO functionality and after some time you leave the SDIO card idle, does the FCLK still remain enabled? Or do you see that sdio_irq_thread exits and disables the FCLK?

What do you mean by "leave the SDIO card idle"?

David
--
David Vrabel, Senior Software Engineer, Drivers
CSR, Churchill House, Cambridge Business Park, Tel: +44 (0)1223 692562
Cowley Road, Cambridge, CB4 0WZ http://www.csr.com/

Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom

-----Original Message-----
From: David Vrabel [mailto:[email protected]]
Sent: Wednesday, February 10, 2010 5:52 AM
To: [email protected]
Cc: David Vrabel; [email protected]; [email protected]
Subject: [PATCH 3/3] mmc: omap_hsmmc: enable SDIO card interrupts

Enable the use of SDIO card interrupts. This requires setting ENAWAKEUP in SYSCONFIG and IWE in HTCL to allow the MMC block to wake-up when in smart-idle mode.

FCLK must be enabled while SDIO interrupts are enabled or the MMC block won't wake-up.

The writes to STAT and ISE when starting a command are unnecessary and have been removed.

Signed-off-by David Vrabel <[email protected]>

---
As noted in the FIXME comment, I think the correct thing to do is to always leave FCLK enabled. The clock/clockdomain subsystems should be configuring smart-idle mode making explicit calls to disable FCLK unnecessary. I couldn't follow the clock subsystem to see if it was actually doing this, though.

---
 drivers/mmc/host/omap_hsmmc.c |   94 ++++++++++++++++++++++++++++--------
-----
 1 files changed, 65 insertions(+), 29 deletions(-)

drivers/mmc/host/omap_hsmmc.c +6 -1

index e6d8cb3..ad0f867 100644
@@ -64,6 +64,7 @@
 #define SDVS_MASK		0x00000E00
 #define SDVSCLR			0xFFFFF1FF
 #define SDVSDET			0x00000400
+#define ENAWAKEUP		(1 << 2)
 #define AUTOIDLE		0x1
 #define SDBP			(1 << 8)
 #define DTO			0xe

@@ -74,9 +75,11 @@
 #define CLKD_SHIFT		6
 #define DTO_MASK		0x000F0000
 #define DTO_SHIFT		16
+#define CIRQ_ENABLE		(1 << 8)
 #define INT_EN_MASK		0x307F0033
 #define BWR_ENABLE		(1 << 4)
 #define BRR_ENABLE		(1 << 5)
+#define CTPL			(1 << 11)
 #define INIT_STREAM		(1 << 1)
 #define DP_SELECT		(1 << 21)
 #define DDIR			(1 << 4)

@@ -84,10 +87,12 @@
 #define MSBS			(1 << 5)
 #define BCE			(1 << 1)
 #define FOUR_BIT		(1 << 1)
+#define IWE			(1 << 24)
 #define DW8			(1 << 5)
 #define CC			0x1
 #define TC			0x02
 #define OD			0x1
+#define CIRQ			(1 << 8)
 #define ERR			(1 << 15)
 #define CMD_TIMEOUT		(1 << 16)
 #define DATA_TIMEOUT		(1 << 20)

@@ -228,7 +233,7 @@ static int omap_hsmmc_context_restore(struct
 omap_hsmmc_host *host)
 		;
 
 	OMAP_HSMMC_WRITE(host->base, SYSCONFIG,
-			OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE);
+			OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE |
 ENAWAKEUP);
 

drivers/mmc/host/omap_hsmmc.c +1 -1

 	if (host->id == OMAP_MMC1_DEVID) {
 		if (host->power_mode != MMC_POWER_OFF &&

@@ -243,7 +248,7 @@ static int omap_hsmmc_context_restore(struct
 omap_hsmmc_host *host)
 	}
 
 	OMAP_HSMMC_WRITE(host->base, HCTL,
-			OMAP_HSMMC_READ(host->base, HCTL) | hctl);
+			OMAP_HSMMC_READ(host->base, HCTL) | hctl | IWE);
 
 	OMAP_HSMMC_WRITE(host->base, CAPA,

drivers/mmc/host/omap_hsmmc.c +1 -1

 			OMAP_HSMMC_READ(host->base, CAPA) | capa);

@@ -257,7 +262,7 @@ static int omap_hsmmc_context_restore(struct
 omap_hsmmc_host *host)
 		;
 
 	OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
-	OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
+	OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK | CIRQ);
 	OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK);
 

drivers/mmc/host/omap_hsmmc.c +0 -6

 	/* Do not initialize card-specific things if the power is off */

@@ -426,12 +431,6 @@ omap_hsmmc_start_command(struct omap_hsmmc_host
 *host, struct mmc_command *cmd,
 		mmc_hostname(host->mmc), cmd->opcode, cmd->arg);
 	host->cmd = cmd;
 
-	/*
-	 * Clear status bits and enable interrupts
-	 */
-	OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
-	OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
-
 	if (host->use_dma)
 		OMAP_HSMMC_WRITE(host->base, IE,

drivers/mmc/host/omap_hsmmc.c +12 -9

 				 INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE));

@@ -638,18 +637,21 @@ static irqreturn_t omap_hsmmc_irq(int irq, void
 *dev_id)
 {
 	struct omap_hsmmc_host *host = dev_id;
 	struct mmc_data *data;
-	int end_cmd = 0, end_trans = 0, status;
+	u32 status;
+	int end_cmd = 0, end_trans = 0;
+	bool card_irq = false;
 
 	spin_lock(&host->irq_lock);
 
-	if (host->mrq == NULL) {
-		OMAP_HSMMC_WRITE(host->base, STAT,
-			OMAP_HSMMC_READ(host->base, STAT));
-		/* Flush posted write */
-		OMAP_HSMMC_READ(host->base, STAT);
-		spin_unlock(&host->irq_lock);
-		return IRQ_HANDLED;
-	}
+	status = OMAP_HSMMC_READ(host->base, STAT);
+	OMAP_HSMMC_WRITE(host->base, STAT, status);
+	OMAP_HSMMC_READ(host->base, STAT); /* Flush posted write. */
+
+	if (status & CIRQ)
+		card_irq = true;
+
+	if (host->mrq == NULL)
+		goto out;
 
 	data = host->data;

drivers/mmc/host/omap_hsmmc.c +41 -7

 	status = OMAP_HSMMC_READ(host->base, STAT);

@@ -704,17 +706,16 @@ static irqreturn_t omap_hsmmc_irq(int irq, void
 *dev_id)
 		}
 	}
 
-	OMAP_HSMMC_WRITE(host->base, STAT, status);
-	/* Flush posted write */
-	OMAP_HSMMC_READ(host->base, STAT);
-
 	if (end_cmd || ((status & CC) && host->cmd))
 		omap_hsmmc_cmd_done(host, host->cmd);
 	if ((end_trans || (status & TC)) && host->mrq)
 		omap_hsmmc_xfer_done(host, data);
-
+out:
 	spin_unlock(&host->irq_lock);
 
+	if (card_irq)
+		mmc_signal_sdio_irq(host->mmc);
+
 	return IRQ_HANDLED;
 }

@@ -1248,6 +1249,41 @@ static int omap_hsmmc_get_ro(struct mmc_host *mmc)
 	return mmc_slot(host).get_ro(host->dev, 0);
 }
 
+static void omap_hsmmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
+{
+	struct omap_hsmmc_host *host = mmc_priv(mmc);
+	u32 ie, con;
+	unsigned long flags;
+
+	spin_lock_irqsave(&host->irq_lock, flags);
+
+	/*
+	 * When interrupts are enabled, CTPL must be set to enable
+	 * DAT1 input buffer (or the card interrupt is always
+	 * asserted) and FCLK must be enabled else wakeup does not
+	 * work.
+	 *
+	 * FIXME: the power save code probably shouldn't be playing
+	 * with FCLK and allow the clock subsystem to put it into
+	 * smart-idle mode instead.
+	 */
+	con = OMAP_HSMMC_READ(host->base, CON);
+	ie = OMAP_HSMMC_READ(host->base, IE);
+	if (enable) {
+		clk_enable(host->fclk);
+		ie |= CIRQ_ENABLE;
+		con |= CTPL;
+	} else {
+		clk_disable(host->fclk);
+		ie &= ~CIRQ_ENABLE;
+		con &= ~CTPL;
+	}
+	OMAP_HSMMC_WRITE(host->base, CON, con);
+	OMAP_HSMMC_WRITE(host->base, IE, ie);
+
+	spin_unlock_irqrestore(&host->irq_lock, flags);
+}
+
 static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host)
 {
 	u32 hctl, capa, value;

@@ -1262,14 +1298,14 @@ static void omap_hsmmc_conf_bus_power(struct
 omap_hsmmc_host *host)
 	}
 
 	value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK;
-	OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl);
+	OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl | IWE);
 
 	value = OMAP_HSMMC_READ(host->base, CAPA);
 	OMAP_HSMMC_WRITE(host->base, CAPA, value | capa);
 
 	/* Set the controller to AUTO IDLE mode */
 	value = OMAP_HSMMC_READ(host->base, SYSCONFIG);
-	OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE);
+	OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE |
 ENAWAKEUP);
 

drivers/mmc/host/omap_hsmmc.c +2 -2

 	/* Set SD bus power bit */
 	set_sd_bus_power(host);

@@ -1516,7 +1552,7 @@ static const struct mmc_host_ops omap_hsmmc_ops = {
 	.set_ios = omap_hsmmc_set_ios,
 	.get_cd = omap_hsmmc_get_cd,
 	.get_ro = omap_hsmmc_get_ro,
-	/* NYET -- enable_sdio_irq */
+	.enable_sdio_irq = omap_hsmmc_enable_sdio_irq,
 };
 
 static const struct mmc_host_ops omap_hsmmc_ps_ops = {

@@ -1526,7 +1562,7 @@ static const struct mmc_host_ops omap_hsmmc_ps_ops =
 {
 	.set_ios = omap_hsmmc_set_ios,
 	.get_cd = omap_hsmmc_get_cd,
 	.get_ro = omap_hsmmc_get_ro,
-	/* NYET -- enable_sdio_irq */
+	.enable_sdio_irq = omap_hsmmc_enable_sdio_irq,
 };
 

#ifdef CONFIG_DEBUG_FS

drivers/mmc/host/omap_hsmmc.c +1 -1

@@ -1731,7 +1767,7 @@ static int __init omap_hsmmc_probe(struct
 platform_device *pdev)
 	mmc->max_seg_size = mmc->max_req_size;
 
 	mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
-		     MMC_CAP_WAIT_WHILE_BUSY;
+		     MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_SDIO_IRQ;
 
 	if (mmc_slot(host).wires >= 8)

drivers/mmc/host/omap_hsmmc.c +1 -1

 		mmc->caps |= MMC_CAP_8_BIT_DATA;

@@ -1802,7 +1838,7 @@ static int __init omap_hsmmc_probe(struct
 platform_device *pdev)
 		}
 	}
 
-	OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
+	OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK | CIRQ);
 	OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK);
 

mmc_host_lazy_disable(host->mmc);
--
1.6.3.3

-----Original Message-----
From: [email protected] [mailto:linux-mmc- [email protected]] On Behalf Of Madhusudhan
Sent: Friday, February 19, 2010 3:05 PM
To: 'David Vrabel'; [email protected]
Cc: [email protected]
Subject: RE: [PATCH 3/3] mmc: omap_hsmmc: enable SDIO card interrupts

Quoted 17 lines

-----Original Message-----
From: David Vrabel [mailto:[email protected]]
Sent: Wednesday, February 10, 2010 5:52 AM
To: [email protected]
Cc: David Vrabel; [email protected]; [email protected]
Subject: [PATCH 3/3] mmc: omap_hsmmc: enable SDIO card interrupts

Enable the use of SDIO card interrupts. This requires setting ENAWAKEUP in SYSCONFIG and IWE in HTCL to allow the MMC block to wake-up when in smart-idle mode.

FCLK must be enabled while SDIO interrupts are enabled or the MMC block won't wake-up.

The writes to STAT and ISE when starting a command are unnecessary and have been removed.

Quoted 7 lines

Signed-off-by David Vrabel <[email protected]>

---
As noted in the FIXME comment, I think the correct thing to do is to always leave FCLK enabled. The clock/clockdomain subsystems should be configuring smart-idle mode making explicit calls to disable FCLK unnecessary. I couldn't follow the clock subsystem to see if it was actually doing this, though.

I Just noticed that SD cards stopped working on Zoom2 if I apply this patch.
I will come back with details on what's going on in a bit unless someone else beats me on that.

Regards,
Madhu

Quoted 2 lines

---
 drivers/mmc/host/omap_hsmmc.c |   94 ++++++++++++++++++++++++++++------

--

Review

Quoted 4 lines

-----

 1 files changed, 65 insertions(+), 29 deletions(-)

(quoted diff) +0 -0

b/drivers/mmc/host/omap_hsmmc.c

drivers/mmc/host/omap_hsmmc.c static int omap_hsmmc_get_ro(struct mmc_host

Quoted 137 lines

index e6d8cb3..ad0f867 100644

drivers/mmc/host/omap_hsmmc.c +6 -1

@@ -64,6 +64,7 @@
 #define SDVS_MASK		0x00000E00
 #define SDVSCLR			0xFFFFF1FF
 #define SDVSDET			0x00000400
+#define ENAWAKEUP		(1 << 2)
 #define AUTOIDLE		0x1
 #define SDBP			(1 << 8)
 #define DTO			0xe

@@ -74,9 +75,11 @@
 #define CLKD_SHIFT		6
 #define DTO_MASK		0x000F0000
 #define DTO_SHIFT		16
+#define CIRQ_ENABLE		(1 << 8)
 #define INT_EN_MASK		0x307F0033
 #define BWR_ENABLE		(1 << 4)
 #define BRR_ENABLE		(1 << 5)
+#define CTPL			(1 << 11)
 #define INIT_STREAM		(1 << 1)
 #define DP_SELECT		(1 << 21)
 #define DDIR			(1 << 4)

@@ -84,10 +87,12 @@
 #define MSBS			(1 << 5)
 #define BCE			(1 << 1)
 #define FOUR_BIT		(1 << 1)
+#define IWE			(1 << 24)
 #define DW8			(1 << 5)
 #define CC			0x1
 #define TC			0x02
 #define OD			0x1
+#define CIRQ			(1 << 8)
 #define ERR			(1 << 15)
 #define CMD_TIMEOUT		(1 << 16)
 #define DATA_TIMEOUT		(1 << 20)

@@ -228,7 +233,7 @@ static int omap_hsmmc_context_restore(struct
 omap_hsmmc_host *host)
 		;
 
 	OMAP_HSMMC_WRITE(host->base, SYSCONFIG,
-			OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE);
+			OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE |
 ENAWAKEUP);
 

drivers/mmc/host/omap_hsmmc.c +1 -1

 	if (host->id == OMAP_MMC1_DEVID) {
 		if (host->power_mode != MMC_POWER_OFF &&

@@ -243,7 +248,7 @@ static int omap_hsmmc_context_restore(struct
 omap_hsmmc_host *host)
 	}
 
 	OMAP_HSMMC_WRITE(host->base, HCTL,
-			OMAP_HSMMC_READ(host->base, HCTL) | hctl);
+			OMAP_HSMMC_READ(host->base, HCTL) | hctl | IWE);
 
 	OMAP_HSMMC_WRITE(host->base, CAPA,

drivers/mmc/host/omap_hsmmc.c +1 -1

 			OMAP_HSMMC_READ(host->base, CAPA) | capa);

@@ -257,7 +262,7 @@ static int omap_hsmmc_context_restore(struct
 omap_hsmmc_host *host)
 		;
 
 	OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
-	OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
+	OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK | CIRQ);
 	OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK);
 

drivers/mmc/host/omap_hsmmc.c +0 -6

 	/* Do not initialize card-specific things if the power is off */

@@ -426,12 +431,6 @@ omap_hsmmc_start_command(struct omap_hsmmc_host
 *host, struct mmc_command *cmd,
 		mmc_hostname(host->mmc), cmd->opcode, cmd->arg);
 	host->cmd = cmd;
 
-	/*
-	 * Clear status bits and enable interrupts
-	 */
-	OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
-	OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
-
 	if (host->use_dma)
 		OMAP_HSMMC_WRITE(host->base, IE,

drivers/mmc/host/omap_hsmmc.c +12 -9

 				 INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE));

@@ -638,18 +637,21 @@ static irqreturn_t omap_hsmmc_irq(int irq, void
 *dev_id)
 {
 	struct omap_hsmmc_host *host = dev_id;
 	struct mmc_data *data;
-	int end_cmd = 0, end_trans = 0, status;
+	u32 status;
+	int end_cmd = 0, end_trans = 0;
+	bool card_irq = false;
 
 	spin_lock(&host->irq_lock);
 
-	if (host->mrq == NULL) {
-		OMAP_HSMMC_WRITE(host->base, STAT,
-			OMAP_HSMMC_READ(host->base, STAT));
-		/* Flush posted write */
-		OMAP_HSMMC_READ(host->base, STAT);
-		spin_unlock(&host->irq_lock);
-		return IRQ_HANDLED;
-	}
+	status = OMAP_HSMMC_READ(host->base, STAT);
+	OMAP_HSMMC_WRITE(host->base, STAT, status);
+	OMAP_HSMMC_READ(host->base, STAT); /* Flush posted write. */
+
+	if (status & CIRQ)
+		card_irq = true;
+
+	if (host->mrq == NULL)
+		goto out;
 
 	data = host->data;

drivers/mmc/host/omap_hsmmc.c +4 -5

 	status = OMAP_HSMMC_READ(host->base, STAT);

@@ -704,17 +706,16 @@ static irqreturn_t omap_hsmmc_irq(int irq, void
 *dev_id)
 		}
 	}
 
-	OMAP_HSMMC_WRITE(host->base, STAT, status);
-	/* Flush posted write */
-	OMAP_HSMMC_READ(host->base, STAT);
-
 	if (end_cmd || ((status & CC) && host->cmd))
 		omap_hsmmc_cmd_done(host, host->cmd);
 	if ((end_trans || (status & TC)) && host->mrq)
 		omap_hsmmc_xfer_done(host, data);
-
+out:
 	spin_unlock(&host->irq_lock);
 
+	if (card_irq)
+		mmc_signal_sdio_irq(host->mmc);
+
 	return IRQ_HANDLED;
 }

@@ -1248,6 +1249,41 @@ static int omap_hsmmc_get_ro(struct mmc_host

*mmc)

drivers/mmc/host/omap_hsmmc.c static int omap_hsmmc_get_ro(struct mmc_host · line 1252

Quoted 4 lines

drivers/mmc/host/omap_hsmmc.c +1 -0

 	return mmc_slot(host).get_ro(host->dev, 0);
 }
 
+static void omap_hsmmc_enable_sdio_irq(struct mmc_host *mmc, int

enable)

drivers/mmc/host/omap_hsmmc.c static const struct mmc_host_ops omap_hsmmc_ops =

Quoted 57 lines

drivers/mmc/host/omap_hsmmc.c +36 -2

+{
+	struct omap_hsmmc_host *host = mmc_priv(mmc);
+	u32 ie, con;
+	unsigned long flags;
+
+	spin_lock_irqsave(&host->irq_lock, flags);
+
+	/*
+	 * When interrupts are enabled, CTPL must be set to enable
+	 * DAT1 input buffer (or the card interrupt is always
+	 * asserted) and FCLK must be enabled else wakeup does not
+	 * work.
+	 *
+	 * FIXME: the power save code probably shouldn't be playing
+	 * with FCLK and allow the clock subsystem to put it into
+	 * smart-idle mode instead.
+	 */
+	con = OMAP_HSMMC_READ(host->base, CON);
+	ie = OMAP_HSMMC_READ(host->base, IE);
+	if (enable) {
+		clk_enable(host->fclk);
+		ie |= CIRQ_ENABLE;
+		con |= CTPL;
+	} else {
+		clk_disable(host->fclk);
+		ie &= ~CIRQ_ENABLE;
+		con &= ~CTPL;
+	}
+	OMAP_HSMMC_WRITE(host->base, CON, con);
+	OMAP_HSMMC_WRITE(host->base, IE, ie);
+
+	spin_unlock_irqrestore(&host->irq_lock, flags);
+}
+
 static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host)
 {
 	u32 hctl, capa, value;

@@ -1262,14 +1298,14 @@ static void omap_hsmmc_conf_bus_power(struct
 omap_hsmmc_host *host)
 	}
 
 	value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK;
-	OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl);
+	OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl | IWE);
 
 	value = OMAP_HSMMC_READ(host->base, CAPA);
 	OMAP_HSMMC_WRITE(host->base, CAPA, value | capa);
 
 	/* Set the controller to AUTO IDLE mode */
 	value = OMAP_HSMMC_READ(host->base, SYSCONFIG);
-	OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE);
+	OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE |
 ENAWAKEUP);
 

drivers/mmc/host/omap_hsmmc.c +0 -0

 	/* Set SD bus power bit */
 	set_sd_bus_power(host);

@@ -1516,7 +1552,7 @@ static const struct mmc_host_ops omap_hsmmc_ops =

{

drivers/mmc/host/omap_hsmmc.c static const struct mmc_host_ops omap_hsmmc_ps_ops

Quoted 9 lines

drivers/mmc/host/omap_hsmmc.c +1 -1

 	.set_ios = omap_hsmmc_set_ios,
 	.get_cd = omap_hsmmc_get_cd,
 	.get_ro = omap_hsmmc_get_ro,
-	/* NYET -- enable_sdio_irq */
+	.enable_sdio_irq = omap_hsmmc_enable_sdio_irq,
 };
 
 static const struct mmc_host_ops omap_hsmmc_ps_ops = {

@@ -1526,7 +1562,7 @@ static const struct mmc_host_ops omap_hsmmc_ps_ops

=

Quoted 28 lines

drivers/mmc/host/omap_hsmmc.c +1 -1

 {
 	.set_ios = omap_hsmmc_set_ios,
 	.get_cd = omap_hsmmc_get_cd,
 	.get_ro = omap_hsmmc_get_ro,
-	/* NYET -- enable_sdio_irq */
+	.enable_sdio_irq = omap_hsmmc_enable_sdio_irq,
 };
 

#ifdef CONFIG_DEBUG_FS

drivers/mmc/host/omap_hsmmc.c +1 -1

@@ -1731,7 +1767,7 @@ static int __init omap_hsmmc_probe(struct
 platform_device *pdev)
 	mmc->max_seg_size = mmc->max_req_size;
 
 	mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
-		     MMC_CAP_WAIT_WHILE_BUSY;
+		     MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_SDIO_IRQ;
 
 	if (mmc_slot(host).wires >= 8)

drivers/mmc/host/omap_hsmmc.c +1 -1

 		mmc->caps |= MMC_CAP_8_BIT_DATA;

@@ -1802,7 +1838,7 @@ static int __init omap_hsmmc_probe(struct
 platform_device *pdev)
 		}
 	}
 
-	OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
+	OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK | CIRQ);
 	OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK);
 

Quoted 3 lines

mmc_host_lazy_disable(host->mmc);
--
1.6.3.3

--
To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to [email protected]
More majordomo info at http://vger.kernel.org/majordomo-info.html
From f18edd943659d4a9632cd0c0c64f4c6a4aa2f206 Mon Sep 17 00:00:00 2001

A little bit of rearranging the David's changes to the irq handler gets the MMC/SD cards to work fine again. Changes are shown in the attached patch for now and it should not hurt the CIRQ handling as well.

Quoted 10 lines

Quoted 10 lines

(quoted diff) +9 -0

+	status = OMAP_HSMMC_READ(host->base, STAT);
+	OMAP_HSMMC_WRITE(host->base, STAT, status);
+	OMAP_HSMMC_READ(host->base, STAT); /* Flush posted write. */
+
+	if (status & CIRQ)
+		card_irq = true;
+
+	if (host->mrq == NULL)
+		goto out;

Quoted 2 lines

drivers/mmc/host/omap_hsmmc.c static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) · line 994

Quoted 2 lines

drivers/mmc/host/omap_hsmmc.c +0 -0

 	data = host->data;
 	status = OMAP_HSMMC_READ(host->base, STAT);

-----Original Message-----
From: David Vrabel [mailto:[email protected]]
Sent: Wednesday, February 10, 2010 5:52 AM
To: [email protected]
Cc: David Vrabel; [email protected]; [email protected]
Subject: [PATCH 1/3] mmc: omap_hsmmc: use packet sync'd DMA

Use packet sync'd DMA in the omap_hsmmc driver to avoid the restriction that transfers must be a multiple of the block size. This is required for byte-mode transfers to SDIO cards.

Signed-off-by David Vrabel <[email protected]>

---
 drivers/mmc/host/omap_hsmmc.c |   17 +++++------------
 1 files changed, 5 insertions(+), 12 deletions(-)

drivers/mmc/host/omap_hsmmc.c +3 -2

index 4b23225..e7142a2 100644
@@ -114,6 +114,7 @@
 
 #define MMC_TIMEOUT_MS		20
 #define OMAP_MMC_MASTER_CLOCK	96000000
+#define OMAP_HSMMC_FIFO_WORDS	(512/4)
 #define DRIVER_NAME		"mmci-omap-hs"
 
 /* Timeouts for entering power saving states on inactivity, msec */

@@ -887,12 +888,12 @@ static void omap_hsmmc_config_dma_params(struct
 omap_hsmmc_host *host,
 	dma_ch = host->dma_ch;
 	if (data->flags & MMC_DATA_WRITE) {
 		omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT,
-			(host->mapbase + OMAP_HSMMC_DATA), 0, 0);
+			(host->mapbase + OMAP_HSMMC_DATA), 0,
 OMAP_HSMMC_FIFO_WORDS);
 		omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC,
 			sg_dma_address(sgl), 0, 0);
 	} else {
 		omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT,
-			(host->mapbase + OMAP_HSMMC_DATA), 0, 0);
+			(host->mapbase + OMAP_HSMMC_DATA), 0,
 OMAP_HSMMC_FIFO_WORDS);

drivers/mmc/host/omap_hsmmc.c +0 -0

 		omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC,
 			sg_dma_address(sgl), 0, 0);
 	}

drivers/mmc/host/omap_hsmmc.c +1 -9

@@ -944,17 +945,9 @@ static void omap_hsmmc_dma_cb(int lch, u16 ch_status,
 void *data)
 static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host,
 					struct mmc_request *req)
 {
-	int dma_ch = 0, ret = 0, err = 1, i;
+	int dma_ch = 0, ret = 0, err = 1;
 	struct mmc_data *data = req->data;
 
-	/* Sanity check: all the SG entries must be aligned by block size.
 */
-	for (i = 0; i < data->sg_len; i++) {
-		struct scatterlist *sgl;
-
-		sgl = data->sg + i;
-		if (sgl->length % data->blksz)
-			return -EINVAL;
-	}
 	if ((data->blksz % 4) != 0)

/* REVISIT: The MMC buffer increments only when MSB is
written.
* Return error for blksz which is non multiple of four.
--
1.6.3.3

Quoted 8 lines

-----Original Message-----
From: David Vrabel [mailto:[email protected]]
Sent: Wednesday, February 10, 2010 5:52 AM
To: [email protected]
Cc: David Vrabel; [email protected]; [email protected]
Subject: [PATCH 1/3] mmc: omap_hsmmc: use packet sync'd DMA

Quoted 4 lines

Use packet sync'd DMA in the omap_hsmmc driver to avoid the restriction that transfers must be a multiple of the block size. This is required for byte-mode transfers to SDIO cards.

What is the typical scenario here? Is it IO_RW_EXTENDED with block_mode turned off?

These patches add support for SDIO cards to the omap_hsmmc driver. Less restrictions on the sizes of transfers, power management changes to prevent SDIO cards from being turned off and losing all state, and card interrupts.

I've been unable to test these exact patches as I only have an N900 for testing and the N900 support in mainline is incomplete.

David Vrabel (3):
mmc: omap_hsmmc: use packet sync'd DMA
mmc: omap_hsmmc: don't turn SDIO cards off when idle
mmc: omap_hsmmc: enable SDIO card interrupts

 drivers/mmc/host/omap_hsmmc.c |  123 ++++++++++++++++++++++++++---------------
 1 files changed, 78 insertions(+), 45 deletions(-)

Hi David,

Quoted 7 lines · David Vrabel

These patches add support for SDIO cards to the omap_hsmmc driver. Less restrictions on the sizes of transfers, power management changes to prevent SDIO cards from being turned off and losing all state, and card interrupts.

I've been unable to test these exact patches as I only have an N900 for testing and the N900 support in mainline is incomplete.

I've tried your patches on CM-T35 that has 8686 SDIO and the result was absence of MMC/SDIO devices at all :( Morover, kmmcd hangs:

[  399.427764] INFO: task kmmcd:149 blocked for more than 120 seconds.
[...]
[  399.485290] [<c01e6264>] (mmc_wait_for_cmd+0x64/0x74) from

[<c01e86b0>] (mmc_go_idle+0x60/0xac)

Quoted 13 lines · Mike Rapoport

Hi David,

Quoted 7 lines · David Vrabel

These patches add support for SDIO cards to the omap_hsmmc driver. Less restrictions on the sizes of transfers, power management changes to prevent SDIO cards from being turned off and losing all state, and card interrupts.

I've been unable to test these exact patches as I only have an N900 for testing and the N900 support in mainline is incomplete.

I've tried your patches on CM-T35 that has 8686 SDIO and the result was absence of MMC/SDIO devices at all :( Morover, kmmcd hangs:

Quoted 4 lines

[  399.427764] INFO: task kmmcd:149 blocked for more than 120 seconds.
[...]
[  399.485290] [<c01e6264>] (mmc_wait_for_cmd+0x64/0x74) from

[<c01e86b0>] (mmc_go_idle+0x60/0xac)

I suspect interrupts aren't enabled correctly as this command does not complete. Try reverting this hunk.

modprobe libertas_sdio

(quoted diff) +0 -6

@@ -426,12 +431,6 @@ omap_hsmmc_start_command(struct omap_hsmmc_host
 *host, struct mmc_command *cmd,
                mmc_hostname(host->mmc), cmd->opcode, cmd->arg);
        host->cmd = cmd;
 
-       /*
-        * Clear status bits and enable interrupts
-        */
-       OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
-       OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
-
        if (host->use_dma)
                OMAP_HSMMC_WRITE(host->base, IE,

                                 INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE));

David

I've started to apply the patches one by one and after the first patch is applied, the SD card works Ok, but libertas fails to initialize with the following messages:

Quoted 1 line

modprobe libertas_sdio

[   82.233489] lib80211: common routines for IEEE802.11 drivers
[   82.833251] cfg80211: Calling CRDA to update world regulatory domain
[   83.327911] libertas_sdio: Libertas SDIO driver
[   83.332489] libertas_sdio: Copyright Pierre Ossman
[   83.348510] libertas_sdio mmc1:0001:1: firmware: requesting
sd8686_helper.bin
[   83.497619] libertas_sdio mmc1:0001:1: firmware: requesting sd8686.bin
[   83.679229] DMA synchronization event drop occurred with device 47

Quoted 5 lines · Mike Rapoport

I've started to apply the patches one by one and after the first patch is applied, the SD card works Ok, but libertas fails to initialize with the following messages:

Quoted 1 line

modprobe libertas_sdio

Quoted 8 lines

[   82.233489] lib80211: common routines for IEEE802.11 drivers
[   82.833251] cfg80211: Calling CRDA to update world regulatory domain
[   83.327911] libertas_sdio: Libertas SDIO driver
[   83.332489] libertas_sdio: Copyright Pierre Ossman
[   83.348510] libertas_sdio mmc1:0001:1: firmware: requesting
sd8686_helper.bin
[   83.497619] libertas_sdio mmc1:0001:1: firmware: requesting sd8686.bin
[   83.679229] DMA synchronization event drop occurred with device 47

What block size are you using? It looks like you're using something less than 512. I've checked the spec again and the DMA packet size should be the block size in words (and not the FIFO depth).

Also, keep in mind that the buffers for transfers must begin and end on a word boundary. The OMAP's DMA controller can only transfer whole words to the MMC FIFO.

David

Quoted 14 lines · David Vrabel

Quoted 13 lines · Mike Rapoport

I've started to apply the patches one by one and after the first patch is applied, the SD card works Ok, but libertas fails to initialize with the following messages:

Quoted 1 line

modprobe libertas_sdio

[   82.233489] lib80211: common routines for IEEE802.11 drivers
[   82.833251] cfg80211: Calling CRDA to update world regulatory domain
[   83.327911] libertas_sdio: Libertas SDIO driver
[   83.332489] libertas_sdio: Copyright Pierre Ossman
[   83.348510] libertas_sdio mmc1:0001:1: firmware: requesting
sd8686_helper.bin
[   83.497619] libertas_sdio mmc1:0001:1: firmware: requesting sd8686.bin
[   83.679229] DMA synchronization event drop occurred with device 47

Quoted 3 lines

What block size are you using? It looks like you're using something less than 512. I've checked the spec again and the DMA packet size should be the block size in words (and not the FIFO depth).

It's quite possible. I haven't dig too much and I really don't know how exactly libertas driver sends/receives the data... I'll continue testing and will try to get some more meaningful info

Quoted 3 lines

Also, keep in mind that the buffers for transfers must begin and end on a word boundary. The OMAP's DMA controller can only transfer whole words to the MMC FIFO.

Quoted 1 line

David

Quoted 4 lines

Quoted 4 lines

Also, keep in mind that the buffers for transfers must begin and end on a word boundary. The OMAP's DMA controller can only transfer whole words to the MMC FIFO.

I've slightly modified your patch "mmc: omap_hsmmc: use packet sync'd DMA" and it
seems to work now, at least with SD card and libertas_sdio:

---
 drivers/mmc/host/omap_hsmmc.c |   23 ++++++++---------------
 1 files changed, 8 insertions(+), 15 deletions(-)

drivers/mmc/host/omap_hsmmc.c +8 -15

index 4b23225..5408bcb 100644
@@ -114,6 +114,7 @@
 
 #define MMC_TIMEOUT_MS		20
 #define OMAP_MMC_MASTER_CLOCK	96000000
+#define OMAP_HSMMC_FIFO_WORDS	(512/4)
 #define DRIVER_NAME		"mmci-omap-hs"
 
 /* Timeouts for entering power saving states on inactivity, msec */

@@ -884,24 +885,24 @@ static void omap_hsmmc_config_dma_params(struct
 omap_hsmmc_host *host,
 {
 	int blksz, nblk, dma_ch;
 
+	blksz = host->data->blksz;
+	nblk = sg_dma_len(sgl) / blksz;
+
 	dma_ch = host->dma_ch;
 	if (data->flags & MMC_DATA_WRITE) {
 		omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT,
-			(host->mapbase + OMAP_HSMMC_DATA), 0, 0);
+			(host->mapbase + OMAP_HSMMC_DATA), 0, blksz / 4);
 		omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC,
 			sg_dma_address(sgl), 0, 0);
 	} else {
 		omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT,
-			(host->mapbase + OMAP_HSMMC_DATA), 0, 0);
+			(host->mapbase + OMAP_HSMMC_DATA), 0, blksz / 4);
 		omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC,
 			sg_dma_address(sgl), 0, 0);
 	}
 
-	blksz = host->data->blksz;
-	nblk = sg_dma_len(sgl) / blksz;
-
 	omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32,
-			blksz / 4, nblk, OMAP_DMA_SYNC_FRAME,
+			blksz / 4, nblk, OMAP_DMA_SYNC_PACKET,
 			omap_hsmmc_get_dma_sync_dev(host, data),
 			!(data->flags & MMC_DATA_WRITE));

@@ -944,17 +945,9 @@ static void omap_hsmmc_dma_cb(int lch, u16 ch_status,
 void *data)
 static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host,
 					struct mmc_request *req)
 {
-	int dma_ch = 0, ret = 0, err = 1, i;
+	int dma_ch = 0, ret = 0, err = 1;
 	struct mmc_data *data = req->data;
 
-	/* Sanity check: all the SG entries must be aligned by block size.
 */
-	for (i = 0; i < data->sg_len; i++) {
-		struct scatterlist *sgl;
-
-		sgl = data->sg + i;
-		if (sgl->length % data->blksz)
-			return -EINVAL;
-	}
 	if ((data->blksz % 4) != 0)

/* REVISIT: The MMC buffer increments only when MSB is
written.
* Return error for blksz which is non multiple of four.
--
1.6.4.4

Quoted 3 lines

Quoted 1 line

David

--
Sincerely yours,
Mike.

<snip>

Quoted 7 lines

Quoted 3 lines

Quoted 3 lines

Also, keep in mind that the buffers for transfers must begin and end on a word boundary. The OMAP's DMA controller can only transfer whole words to the MMC FIFO.

I've slightly modified your patch "mmc: omap_hsmmc: use packet sync'd DMA" and it
seems to work now, at least with SD card and libertas_sdio:

Mike,

As per the latest discussion, David replied that this patch is not needed and FRAME sync just works fine. So, without this patch does SDIO int functionality work for you?

Regards,
Madhu

Quoted 82 lines

---
 drivers/mmc/host/omap_hsmmc.c |   23 ++++++++---------------
 1 files changed, 8 insertions(+), 15 deletions(-)

drivers/mmc/host/omap_hsmmc.c +8 -15

index 4b23225..5408bcb 100644
@@ -114,6 +114,7 @@
 
 #define MMC_TIMEOUT_MS		20
 #define OMAP_MMC_MASTER_CLOCK	96000000
+#define OMAP_HSMMC_FIFO_WORDS	(512/4)
 #define DRIVER_NAME		"mmci-omap-hs"
 
 /* Timeouts for entering power saving states on inactivity, msec */

@@ -884,24 +885,24 @@ static void omap_hsmmc_config_dma_params(struct
 omap_hsmmc_host *host,
 {
 	int blksz, nblk, dma_ch;
 
+	blksz = host->data->blksz;
+	nblk = sg_dma_len(sgl) / blksz;
+
 	dma_ch = host->dma_ch;
 	if (data->flags & MMC_DATA_WRITE) {
 		omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT,
-			(host->mapbase + OMAP_HSMMC_DATA), 0, 0);
+			(host->mapbase + OMAP_HSMMC_DATA), 0, blksz / 4);
 		omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC,
 			sg_dma_address(sgl), 0, 0);
 	} else {
 		omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT,
-			(host->mapbase + OMAP_HSMMC_DATA), 0, 0);
+			(host->mapbase + OMAP_HSMMC_DATA), 0, blksz / 4);
 		omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC,
 			sg_dma_address(sgl), 0, 0);
 	}
 
-	blksz = host->data->blksz;
-	nblk = sg_dma_len(sgl) / blksz;
-
 	omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32,
-			blksz / 4, nblk, OMAP_DMA_SYNC_FRAME,
+			blksz / 4, nblk, OMAP_DMA_SYNC_PACKET,
 			omap_hsmmc_get_dma_sync_dev(host, data),
 			!(data->flags & MMC_DATA_WRITE));

@@ -944,17 +945,9 @@ static void omap_hsmmc_dma_cb(int lch, u16 ch_status,
 void *data)
 static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host,
 					struct mmc_request *req)
 {
-	int dma_ch = 0, ret = 0, err = 1, i;
+	int dma_ch = 0, ret = 0, err = 1;
 	struct mmc_data *data = req->data;
 
-	/* Sanity check: all the SG entries must be aligned by block size.
 */
-	for (i = 0; i < data->sg_len; i++) {
-		struct scatterlist *sgl;
-
-		sgl = data->sg + i;
-		if (sgl->length % data->blksz)
-			return -EINVAL;
-	}
 	if ((data->blksz % 4) != 0)

/* REVISIT: The MMC buffer increments only when MSB is
written.
* Return error for blksz which is non multiple of four.
--
1.6.4.4

Quoted 2 lines

Quoted 1 line

David

--
Sincerely yours,
Mike.

Quoted 10 lines · Mike Rapoport

Hi David,

Quoted 7 lines · David Vrabel

These patches add support for SDIO cards to the omap_hsmmc driver. Less restrictions on the sizes of transfers, power management changes to prevent SDIO cards from being turned off and losing all state, and card interrupts.

I've been unable to test these exact patches as I only have an N900 for testing and the N900 support in mainline is incomplete.

Quoted 7 lines

I've tried your patches on CM-T35 that has 8686 SDIO and the result was absence of MMC/SDIO devices at all :( Morover, kmmcd hangs:

[  399.427764] INFO: task kmmcd:149 blocked for more than 120 seconds.
[...]
[  399.485290] [<c01e6264>] (mmc_wait_for_cmd+0x64/0x74) from

[<c01e86b0>] (mmc_go_idle+0x60/0xac)

I suspect interrupts aren't enabled correctly as this command does not complete. Try reverting this hunk.

(quoted diff) +0 -6

@@ -426,12 +431,6 @@ omap_hsmmc_start_command(struct omap_hsmmc_host
 *host, struct mmc_command *cmd,
                mmc_hostname(host->mmc), cmd->opcode, cmd->arg);
        host->cmd = cmd;
 
-       /*
-        * Clear status bits and enable interrupts
-        */
-       OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
-       OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
-
        if (host->use_dma)
                OMAP_HSMMC_WRITE(host->base, IE,

                                 INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE));

David

Reverting this hunk and reverting/adjusting changes to IRQ handler makes SD card recognizable again. No luck with SDIO interrupts though...